Deep Silicon Trench Etching With Multi-Loop Bosch Timing
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Solution Overview
Problem
Existing semiconductor manufacturing techniques face challenges in forming high aspect ratio openings, such as deep trenches, in silicon substrates with consistent diameter from top to bottom, limiting the depth and aspect ratio of features like trench capacitors and isolation structures.
Innovation Solution
A method involving multiple etch loops with varying deposition and etch times is employed, where the second etch loop has at least 10% greater deposition and etch times than the first, allowing for deeper trenches with an aspect ratio of at least 10:1 and maintaining a bottom diameter of at least 75% of the top diameter, facilitating the formation of deep trench isolation and high-density trench capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single etch loop with constant deposition and etch times is used, then the process is simple and fast, but the trench diameter cannot be maintained constant from top to bottom when forming deep trenches
Solution Approach 1:
The etch process is divided into multiple etch loops (first etch loop, second etch loop, etc.), where each loop has progressively increased deposition and etch times. This segmentation allows different process parameters to be applied at different depth ranges, maintaining trench diameter consistency throughout the deep trench formation while managing process complexity through systematic progression.
Solution Approach 2:
The deposition time and etch time are made dynamic rather than static. Each subsequent etch loop uses longer deposition and etch times than the previous loop, allowing the process to adapt to the changing trench depth and maintain consistent diameter. This dynamic adjustment resolves the contradiction between precision and complexity.
2Length of moving object
If longer etch times are used to achieve deeper trenches, then trench depth increases, but trench diameter control becomes more difficult
Solution Approach 1:
The etch process uses periodic alternating deposition and etching cycles within each etch loop. This periodic action allows the trench to be etched deeper while periodically depositing material to maintain sidewall integrity and diameter control. The multi-loop structure with increasing times enables progressive depth achievement while preserving diameter precision.
3Manufacturing precision
If deposition time is increased to maintain trench sidewalls, then sidewall protection improves, but process time increases
Solution Approach 1:
Each etch loop uses a deposition time that is partially sufficient for the current trench depth, with the understanding that subsequent loops will provide additional deposition time. This partial action in each loop, combined with the progressive multi-loop structure, achieves sidewall integrity while managing total process time more efficiently than using excessive deposition time in a single loop.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of very deep, high aspect-ratio trenches, enhancing the performance of devices like trench capacitors and isolation structures by maintaining consistent dimensions and allowing for reduced isolation spacing, thus improving device density and functionality.
Implementation Method 1
a deposition process executed for a first deposition time and an etch process executed for a first etch time
Implementation Method 2
a deposition process executed for a first deposition time and an etch process executed for a first etch time
Implementation Method 3
an etch process executed for a first etch time... the second etch time is at least 10% greater than the first etch time
Data Source
AI summary
A method of forming an integrated circuit includes forming a plurality of openings in a resist layer over a semiconductor substrate and removing portions of a semiconductor surface layer exposed by the openings, thereby forming a plurality of deep trenches. Removing the portions includes performing a first etch loop for a first plurality of repetitions, the first etch loop including a deposition process executed for a first deposition time and an etch process executed for a first etch time. The removing further includes performing a second etch loop for a second plurality of repetitions, the second etch loop including the deposition process executed for a second deposition time and an etch process executed for a second etch time. The second deposition time is at least 10% greater than the first deposition time, and the second etch time is at least 10% greater than the first etch time.