Bottle-Shaped Deep Trench Capacitor for Stress and CMP Residue
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Solution Overview
Problem
Conventional planar capacitors face challenges in increasing storage charge without occupying excessive space, leading to substrate fractures and polishing residue issues in semiconductor devices.
Innovation Solution
Designing deep trench capacitors with a bottle-shaped trench structure and strategically placed voids in the dielectric layer to absorb stress and avoid polishing residue.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the area of the capacitor is increased to store more charges, then the storage charge increases, but the area occupied by the capacitor increases
Solution Approach 1:
The patent transitions from a planar capacitor structure to a three-dimensional deep trench capacitor structure. By etching trenches into the substrate and filling them with dielectric material and electrodes, the capacitor extends vertically into the substrate, utilizing the third dimension (depth) to increase capacitance without proportionally increasing the surface area occupied.
Solution Approach 2:
The patent embeds the capacitor structure within the substrate by creating deep trenches and filling them with alternating layers of dielectric material and electrodes. This nesting approach allows the capacitor to be integrated within the substrate volume rather than occupying additional surface area, effectively hiding the capacitance-generating structure inside the existing device footprint.
2Device complexity
If conventional planar capacitor structure is used, then the structure is simple, but substrate fractures occur due to stress accumulation
Solution Approach 1:
The patent intentionally introduces voids (empty spaces) within the dielectric layer of the deep trench capacitor. These voids act as stress-absorbing features that prevent stress accumulation and propagation through the substrate, thereby reducing the risk of substrate fractures while maintaining structural integrity.
Solution Approach 2:
The voids within the dielectric layer serve as intermediary stress-absorbing elements. They provide a mechanism for dissipating mechanical stress generated during fabrication processes (such as CMP) and operational conditions, preventing direct stress transmission that would lead to substrate fractures.
3Reliability
If voids are placed high in the trench, then stress absorption is effective, but polishing slurry remains on the surface after planarization
Solution Approach 1:
The patent applies the concept of local quality by strategically positioning voids at specific depths within the dielectric layer - not too high to cause polishing residue, not too low to reduce stress absorption effectiveness. The bottle-shaped trench design concentrates voids in the lower portion where they can absorb stress without interfering with the planarization process at the surface level.
Data Source
AI summary
The invention provides a semiconductor structure with a deep trench capacitor structures, which comprises a substrate, the substrate comprises a bottle-shaped trench, wherein the bottle-shaped trench has an upper part and a lower part in a cross section, and the interface between the upper part and the lower part is a bottleneck line, wherein the bottleneck line is the part with the smallest width in the bottle-shaped trench, a first dielectric layer is filled in the bottle-shaped trench, and a void is located in the first dielectric layer, wherein the highest point of the void is lower than the bottleneck line.