Deep Trench Capacitor Substrates for Multi-Core Package Warpage Control

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Solution Overview

Problem

The integration of more computing cores into a single package in computing platforms leads to issues with warpage, power delivery, and thermal management, necessitating high-performance architectures that address these challenges.

Innovation Solution

The integration of deep trench capacitors in multi-core integrated circuit device package substrates, utilizing substrate cores with specific materials and structures to enhance thermal management, power delivery, and reliability, including glass or organic dielectric materials, and embedding components like capacitors and inductors to prevent shifting and rotating.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If more integrated circuit devices are integrated into a single package, then functionality and performance are enhanced, but warpage and manufacturing precision deteriorate

Engineering Contradiction:
ImprovefunctionalityVSAvoidwarpage
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating a multi-layer substrate structure where different regions have different properties. The first substrate core has a first height and the second substrate core has a second height, creating localized variations in the substrate structure. This allows different areas to serve different functions while maintaining overall package integrity and reducing warpage issues.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The substrate is segmented into multiple layers with different heights - a first substrate core and a second substrate core. This segmentation allows the package to accommodate multiple integrated circuit devices at different levels, enhancing functionality while each segment can be manufactured and controlled independently to minimize warpage.

Inventive Principle:
Principle #1Segmentation

2Power

If more power delivery components are integrated into the package, then power delivery capability is improved, but device complexity increases

Engineering Contradiction:
Improvepower delivery capabilityVSAvoiddevice complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into the substrate structure itself. The multi-layer substrate with different heights integrates power delivery components, interconnect structures, and mechanical support functions into a unified structure, reducing overall device complexity while improving power delivery capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes the vertical dimension by creating substrate cores with different heights. This allows power delivery components to be arranged in three-dimensional space rather than just on a single plane, increasing power delivery capability without proportionally increasing planar device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If more computing cores are integrated into a package, then performance is enhanced, but thermal management becomes more difficult

Engineering Contradiction:
ImproveperformanceVSAvoidthermal management
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The substrate is divided into multiple segments or layers with different heights, allowing heat from multiple computing cores to be dissipated through different thermal pathways. Each substrate layer can be designed with appropriate thermal conductivity and heat dissipation structures tailored to the specific thermal loads in that region.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250219028A1Deep trench capacitors in multi-core integrated circuit device package substrates
Publication Date: 2025.07.03 INTEL CORP
  • US20250219028A1 patent drawing
  • US20250219028A1 patent drawing
  • US20250219028A1 patent drawing

AI summary

An apparatus is provided which comprises: a substrate core comprising a first core layer bonded with a second core layer, one or more redistribution layers on a first substrate core surface, one or more conductive contacts on a second substrate core surface opposite the first substrate core surface, one or more vias through the substrate core, a first circuit component embedded entirely within a cavity in the first core layer, the first circuit component coupled with a first redistribution layers surface, wherein the first circuit component and the first core layer have substantially equivalent heights, and wherein the first circuit component comprises a deep trench capacitor, and one or more integrated circuit devices coupled with a second redistribution layers surface opposite the first redistribution layers surface. Other embodiments are also disclosed and claimed.