Deep Trench Contact Structure for Semiconductor Isolation
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Solution Overview
Problem
High-speed semiconductor devices face challenges in controlling spurious capacitance and resistance, leading to RC delay and unnecessary energy loss, which hinders frequency improvement and device stability.
Innovation Solution
A semiconductor device with a deep trench contact structure is formed between deep trench insulating structures, electrically connected to a substrate under an insulating buried layer, using an undoped polysilicon insulating material to buffer stress and improve stability, and a conductive buried layer for external connection to manage spurious charges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If deep trench insulating structures are formed to isolate adjacent devices, then device isolation and power parameter control are improved, but spurious capacitance increases causing coupling effects and noise
Solution Approach 1:
A conductive layer is introduced as an intermediary between the deep trench insulating structures and the substrate. This conductive layer acts as a mediator that provides a controlled electrical path, reducing the spurious capacitance coupling effect while maintaining device isolation. The conductive layer is positioned to electrically connect regions that would otherwise be coupled through capacitive effects in the insulating material.
Solution Approach 2:
The electrical parameters of the substrate region are modified by introducing the conductive layer, which changes the capacitance and resistance characteristics. This parameter change reduces the spurious capacitance effect and allows for controlled voltage distribution, thereby reducing noise and coupling effects between adjacent devices.
2Productivity
If device integration density is increased to improve productivity, then more devices fit on chip, but RC delay increases hindering device speed and frequency improvement
Solution Approach 1:
The resistance and capacitance parameters are modified by introducing conductive layers and optimizing the electrical path. This parameter change reduces the RC delay product, allowing for higher integration density without sacrificing device speed. The conductive structures provide lower resistance paths that compensate for the increased capacitance from closer device spacing.
3Speed
If higher device speeds are pursued to improve performance, then device performance increases, but spurious resistance and capacitance control becomes more difficult increasing energy loss
Solution Approach 1:
Conductive layers are introduced as intermediary elements that provide controlled electrical paths between devices. These intermediaries reduce spurious resistance by providing dedicated low-resistance connection paths, thereby reducing energy loss due to resistive heating while enabling higher device operating speeds.
Data Source
AI summary
A semiconductor device is provided. An insulating buried layer is formed in a substrate. Deep trench insulating structures are formed on the insulating buried layer. A deep trench contact structure is formed between the deep trench insulating structures. The deep trench contact structure is electrically connected with the substrate under the insulating buried layer.