Back-Side Deep Trench Isolation with Doped Buffer for Dark Current
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Solution Overview
Problem
CMOS image sensors face issues with increased dark current and white pixel number due to contaminants diffusing into the semiconductor substrate during the deep trench etch process, leading to interface defects near the deep trench isolation structures.
Innovation Solution
A CMOS image sensor is designed with a doped region laterally arranged between the deep trench isolation structures and the image sensing element, which separates the image sensing element from the deep trench isolation structures, thereby preventing interaction with interface defects and reducing dark current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If deep trench isolation structures are formed close to the image sensing element, then device integration is improved, but contaminants diffuse into the semiconductor substrate during etching causing interface defects and increased dark current
Solution Approach 1:
An intermediate doped region is introduced between the deep trench isolation structure and the image sensing element. This doped region acts as a mediator that prevents contaminants from the deep trench etch process from reaching and damaging the image sensing element, thereby reducing interface defects and dark current while allowing the deep trench isolation to be formed close to the sensing element for improved integration
Solution Approach 2:
The space between the deep trench isolation structure and the image sensing element is segmented into a separate doped region. This segmentation creates a distinct functional zone that serves as a protective buffer, allowing the deep trench isolation to be positioned closer to the sensing element without direct contamination risk
2Ease of manufacture
If deep trench etch process is performed, then isolation structures are formed, but contaminants diffuse into the semiconductor substrate causing interface defects
Solution Approach 1:
The doped region is formed in advance before the deep trench etch process. This preliminary doping action prepares the semiconductor substrate by creating a protected zone that will prevent contaminant diffusion during the subsequent deep trench etching, thereby maintaining manufacturing precision while enabling isolation structure formation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of a doped region effectively reduces dark current and improves white pixel number performance without adverse side effects, enhancing the overall image quality of digital imaging devices.
Implementation Method 1
contaminants diffusing into the semiconductor substrate during the deep trench etch process
Implementation Method 2
A CMOS image sensor is designed with a doped region laterally arranged between the deep trench isolation structures and the image sensing element
Data Source
AI summary
The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a semiconductor substrate having sidewalls that form one or more trenches. The one or more trenches are disposed along opposing sides of a photodiode and vertically extend from an upper surface of the semiconductor substrate to within the semiconductor substrate. A doped region is arranged along the upper surface of the semiconductor substrate and along opposing sides of the photodiode. A first dielectric lines the sidewalls of the semiconductor substrate and the upper surface of the semiconductor substrate. A second dielectric lines sidewalls and an upper surface of the first dielectric. The doped region has a width laterally between a side of the photodiode and a side of the first dielectric. The width of the doped region varies at different heights along the side of the photodiode.