Deep Trench Isolation Structure for Image Sensor Crosstalk
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Solution Overview
Problem
Image sensor chips experience cross-talk due to tilted light penetrating through deep trenches separating image sensors, leading to interference between neighboring pixels.
Innovation Solution
Formation of Deep Trench Isolation (DTI) structures with specific etching and filling processes to create a boron-doped epitaxial layer and filling materials that mitigate optical crosstalk, ensuring electrical isolation and graded doping transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If deep trenches are formed to separate image sensors, then electrical isolation between neighboring devices is improved, but optical crosstalk occurs due to tilted light penetrating through the trenches
Solution Approach 1:
The patent employs a composite isolation structure combining multiple materials: silicon oxide filling material in the deep trench, silicon nitride layer on sidewalls, and boron-doped epitaxial layer at the bottom. This multi-material approach creates both electrical isolation and optical blocking properties that single materials cannot achieve alone, effectively preventing tilted light penetration while maintaining electrical separation.
Solution Approach 2:
The patent applies different material properties to different regions of the trench structure. The silicon nitride layer is specifically positioned on sidewalls to provide mechanical strength and partial optical blocking, while the boron-doped epitaxial layer is placed at the trench bottom where tilted light most frequently penetrates. This localized material distribution optimizes both electrical isolation and crosstalk prevention in their respective critical regions.
2Ease of manufacture
If the wafer is thinned for BSI image sensor chip formation, then backside structures can be formed, but deep trenches become more susceptible to light penetration
Solution Approach 1:
The patent forms the deep trench isolation structure with enhanced optical blocking capabilities before the wafer thinning process. By pre-establishing the multi-material trench structure including boron-doped epitaxial layer and silicon nitride, the isolation structure is already in place to prevent light penetration before the wafer is thinned, making the thinned wafer more susceptible to light penetration issues.
Solution Approach 2:
The patent modifies the physical and chemical parameters of the trench filling materials to enhance optical blocking. The boron doping concentration in the epitaxial layer is specifically controlled to optimize both electrical isolation and optical absorption. Additionally, the refractive index mismatch between different materials in the trench structure is utilized to scatter and block tilted light paths that would otherwise penetrate through the thinned wafer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces cross-talk and dark current issues by effectively isolating image sensors, enhancing pixel performance and reducing white pixel defects.
Implementation Method 1
an epitaxial layer lined between the lower portion of the filling material and the semiconductor substrate
Implementation Method 2
The deep trenches are filled with dielectric materials, which may include an oxide, to isolate neighboring devices from each other
Data Source
AI summary
A semiconductor structure is disclosed. The semiconductor structure includes: a semiconductor substrate having a front surface and a back surface facing opposite to the front surface; a filling material extending from the front surface into the semiconductor substrate without penetrating through the semiconductor substrate, the filling material including an upper portion and a lower portion, the upper portion being in contact with the semiconductor substrate; and an epitaxial layer lined between the lower portion of the filling material and the semiconductor substrate. An associated manufacturing method is also disclosed.