Deep Trench Isolation Liner Profile for High-Voltage Breakdown
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current deep trench isolation (DTI) structures in integrated chips face challenges with current leakage and device performance degradation due to thin insulator liners, which break down under high voltage biases, compromising electrical isolation between semiconductor devices.
Innovation Solution
The method involves forming a DTI structure with an insulator liner that has varying thickness and protrusions to ensure a high breakdown voltage, where the liner is thick enough to maintain isolation even after removal processes, and is coupled with a shallow trench isolation (STI) structure to surround semiconductor devices effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a thin insulator liner is used in the DTI structure, then the area occupied by the isolation structure is reduced, but the breakdown voltage decreases causing current leakage
Solution Approach 1:
The insulator liner is designed with non-uniform thickness, being thicker at the bottom portion of the trench and thinner at the top portion. This local quality variation allows the critical bottom region to have high breakdown voltage for reliable isolation, while the overall structure occupies less area compared to a uniformly thick liner
Solution Approach 2:
The solution transitions from considering only the horizontal area occupation to incorporating vertical dimension optimization. By varying the liner thickness in the vertical direction (thicker at bottom, thinner at top), the design achieves both area efficiency and high breakdown voltage without requiring a uniformly thick structure throughout
2Reliability
If the insulator liner thickness is increased to prevent breakdown, then electrical isolation reliability is improved, but the area occupied by the isolation structure increases
Solution Approach 1:
Instead of uniformly increasing the liner thickness throughout the structure, the invention applies local quality by making the liner thicker only where it is most needed (at the bottom portion for high voltage isolation) and thinner in less critical regions (top portion), thereby achieving high reliability without excessive area occupation
Solution Approach 2:
The invention changes the thickness parameter of the insulator liner from a constant value to a variable value that changes with position in the trench. This parameter variation allows optimization of breakdown voltage in critical regions while minimizing overall area occupation
Data Source
AI summary
In some embodiments, the present disclosure relates to a method that includes forming a shallow trench isolation (STI) structure that extends into a substrate. A masking layer is formed over the substrate and includes an opening overlying the STI structure. A first removal process removes portions of the STI structure underlying the opening of the STI structure. A second removal process laterally removes portions of the substrate below the STI structure. A third removal process removes portions of the substrate that directly underlie the opening of the masking layer. An insulator liner layer is formed within inner surfaces of the substrate as defined by the first, second, and third removal processes. Further, a fourth removal process removes portions of the insulator liner layer covering a lower surface of the substrate. A semiconductor material is then formed over the SOI substrate and on the insulator liner layer.