Deep Trench Isolation Structure for High Voltage Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional isolation structures fail to meet the high breakdown voltage requirements for compactly arranged high voltage (HV) devices in integrated circuits, leading to electrical isolation challenges.

Innovation Solution

A deep trench isolation structure is created in a semiconductor substrate, where a deep trench extends from a first portion to a second portion, with an insulator region lining the sides, including a shallow trench that is formed over a portion of the deep trench to enhance the top corner oxide thickness and improve electrical isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional isolation structures are used, then manufacturing process is simple, but breakdown voltage requirement is not met

Engineering Contradiction:
Improvebreakdown voltageVSAvoidisolation structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The isolation structure is divided into two distinct segments: a deep trench extending into the substrate and shallow trenches formed at the surface level. This segmentation allows each trench type to perform its isolation function at different depths, achieving high breakdown voltage through the deep trench while the shallow trenches provide additional surface-level isolation, thus resolving the contradiction between reliability and structural complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from conventional single-level isolation to a multi-dimensional isolation architecture by introducing both deep vertical trenches and shallow surface trenches. This dimensional extension creates a three-dimensional isolation network that enhances breakdown voltage capability without significantly complicating the manufacturing process, as both trench types can be formed using standard semiconductor fabrication techniques.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If HV devices are arranged compactly, then chip area is reduced, but electrical isolation becomes challenging

Engineering Contradiction:
Improvechip areaVSAvoidelectrical isolation
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The shallow trenches are positioned to overlay portions of the deep trenches, creating a nested configuration where the shallow trench structure is superimposed on the deeper isolation structure. This nesting arrangement maximizes the use of the same spatial region, providing enhanced electrical isolation through multiple trench layers without increasing the horizontal chip area, thus enabling compact HV device arrangement while maintaining reliable isolation.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Reliability

If deep trench isolation structure is implemented, then breakdown voltage margin is increased, but manufacturing complexity increases

Engineering Contradiction:
Improvebreakdown voltage marginVSAvoidfabrication process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The deep trenches are formed first in the substrate before the shallow trenches are created at the surface level. This preliminary action allows the deep isolation structure to be established as a foundation, and subsequent shallow trench formation can be performed using the deep trenches as alignment references or masks, simplifying the overall manufacturing process while achieving the desired breakdown voltage margin.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11031281B2Semiconductor devices and methods of fabricating a deep trench isolation structure
Publication Date: 2021.06.08 GLOBALFOUNDRIES SINGAPORE PTE LTD
  • US11031281B2 patent drawing
  • US11031281B2 patent drawing
  • US11031281B2 patent drawing

AI summary

According to various embodiments, a semiconductor device may include: a semiconductor substrate; a deep trench extending from a first portion of the semiconductor substrate to a second portion of the semiconductor substrate, wherein the second portion underlies the first portion; and an insulator region at least substantially lining sides of the deep trench. The insulator region includes at least one shallow trench in the first portion of the semiconductor substrate. At least a portion of the shallow trench(es) is arranged over at least a portion of the deep trench.