Deep Trench Isolation Structures for RF Linearity
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Solution Overview
Problem
Radio frequency (RF) devices built on bulk Si substrates suffer from degraded linearity, harmonics, and leakage currents, leading to higher manufacturing costs due to the need for high resistivity silicon on insulator (SOI) substrates, which are expensive and account for up to 50% of the total manufacturing cost.
Innovation Solution
Deep trench isolation structures with tapered sidewalls and an airgap lined with insulator material are etched into the substrate, extending below the depletion region and terminating in the interlevel dielectric material, providing improved electrical isolation and reducing harmonics, while being cost-effective by using bulk Si substrates instead of SOI.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bulk Si substrates are used instead of high resistivity SOI substrates, then manufacturing cost is reduced (bulk Si is 4 to 5 times less expensive), but device performance deteriorates (degraded linearity, increased harmonics, and leakage currents)
Solution Approach 1:
The substrate is segmented into isolated regions by etching deep trenches that extend below the depletion region. This segmentation electrically isolates individual devices on the bulk Si substrate, preventing harmful interactions and improving linearity while maintaining the cost advantage of bulk Si over SOI substrates
Solution Approach 2:
An airgap filled with insulator material serves as an intermediary element within the deep trench structure. This airgap provides enhanced electrical isolation and reduces capacitance between adjacent devices, thereby improving linearity and reducing harmonics while allowing the use of inexpensive bulk Si substrates
2Reliability
If high resistivity SOI substrates are used, then device performance improves (excellent vertical isolation and linearity), but manufacturing cost increases (up to 50% of total manufacturing cost)
Solution Approach 1:
Instead of requiring globally high resistivity SOI substrates, the invention applies local isolation structures (deep trenches with airgaps) at specific locations between devices. This provides the necessary electrical isolation and linearity improvement locally while allowing the use of cheaper bulk Si substrates globally
Solution Approach 2:
The invention extends isolation into the vertical dimension by etching deep trenches that go below the depletion region, rather than relying solely on lateral isolation or shallow trenches. This deep vertical isolation achieves the performance benefits of SOI substrates while using cost-effective bulk Si
3Reliability
If deep trench isolation structures with airgap are implemented, then leakage currents and harmonics are reduced, but device complexity increases
Solution Approach 1:
The deep trench isolation structure incorporates an airgap (a porous/void space) filled with insulator material. This airgap reduces capacitance and improves electrical isolation, effectively reducing leakage currents and harmonics while the insulator lining maintains structural integrity
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to deep trench isolation structures and methods of manufacture. The structure includes: at least one gate structure on a substrate; an interlevel dielectric material above the substrate; and a trench isolation structure extending into the substrate adjacent to the at least one gate structure and terminating in the interlevel dielectric material above the substrate.