Deep Trench Isolation for Semiconductor Breakdown Voltage
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Solution Overview
Problem
Existing semiconductor device manufacturing techniques using deep trench isolation methods fail to distinguish between high-breakdown voltage and high-frequency semiconductor devices, leading to inconsistent performance due to impurity diffusion issues affecting breakdown voltage and element isolation.
Innovation Solution
The semiconductor device employs a deep trench structure with separate first and second trenches, where the first trench is formed above the buried layer to prevent impurity diffusion, and the second trench is formed below with a smaller opening diameter, using sidewall oxide films to control impurity profiles and enhance breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single deep trench structure is used for both high-breakdown voltage and high-frequency semiconductor devices, then manufacturing is simplified, but performance consistency is compromised due to different isolation requirements
Solution Approach 1:
The patent creates a universal deep trench structure with two sections that can serve different semiconductor device types. The first trench section with larger opening diameter can be adjusted for high-frequency devices requiring low capacitance, while the second trench section provides the isolation needed for high-breakdown voltage devices. By making the opening diameters and depths adjustable parameters, a single trench structure design can accommodate both device types with consistent performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves both inter-element and intra-element breakdown voltage while maintaining element characteristics, allowing for the fabrication of both high-breakdown voltage and high-frequency semiconductor devices with improved isolation and reduced capacitance.
Implementation Method 1
the N-type impurities of the buried layer diffuse outward to the sidewalls of the deep trench
Implementation Method 2
an insulation film that covers at least the inner surfaces of the deep trench is formed by thermal oxidation at 850° C. to 1,200° C.
Implementation Method 3
silicon oxide film is formed to fill the inside of the deep trench by the chemical vapor deposition (CVD) method
Data Source
AI summary
According to one embodiment, a semiconductor device includes: a substrate in which, on a semiconductor substrate of a first conductivity type, a buried layer of a second conductivity type and a semiconductor layer of the second conductivity type are stacked; trench that define an element forming region in the substrate; element isolation insulation film formed in the trench; and a semiconductor element formed in the element forming region. The trench include first trench formed from the surface of the substrate to boundary depth and second trench formed from the boundary depth to the bottom and having a diameter smaller than that of the first trench. First diffusion layers connected to the buried layer are formed around the first or second trench according to inter-element breakdown voltage required of the semiconductor element.