Deep Trench Isolation on SOI Substrates for Thermal Management

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Solution Overview

Problem

As semiconductor devices shrink to smaller sizes and operate at higher frequencies, they generate more heat, leading to undesired leakage currents and requiring effective heat removal techniques, while maintaining precise control over deep trench structures in limited spaces.

Innovation Solution

A method for forming a semiconductor device with deep trench isolation structures on semiconductor-on-insulator (SOI) substrates, involving the formation of a trench filled with a thermally conductive material that is electrically insulating to prevent leakage currents, using a multi-step process involving hard mask layers, spacer deposition, and etching to extend the trench through the insulator layer to the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor devices are scaled to smaller sizes and operated at higher frequencies, then device performance and integration density are improved, but heat generation increases causing undesired leakage currents

Engineering Contradiction:
Improvedevice performanceVSAvoidheat generation
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the heat dissipation function from the traditional isolation trench by filling it with thermally conductive material, separating the electrical isolation function (performed by the oxide layer) from the thermal management function (performed by the thermally conductive filler material). This allows the device to maintain small dimensions while effectively removing heat to prevent leakage currents.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses composite material structure in the trench consisting of an oxide layer for electrical isolation and thermally conductive material for heat dissipation. This composite approach simultaneously addresses both electrical leakage prevention and thermal management in the scaled device.

Inventive Principle:
Principle #40Composite materials

2Productivity

If multiple trench structures are fabricated in limited space, then integration density is improved, but alignment precision and defect control become more difficult

Engineering Contradiction:
Improveintegration densityVSAvoidalignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary patterning actions using mandrel formation and spacer deposition before the final trench etch. This multi-step preliminary process establishes precise alignment references that guide subsequent trench formation, enabling accurate positioning of multiple trenches in limited space while maintaining manufacturing precision.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively conducts heat away from the device while preventing electrical leakage, ensuring precise alignment and defect-free trench structures, suitable for high-voltage radio frequency applications.

Implementation Method 1

a thermally conductive material can be filled into the deep trench

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

filled with a thermally conductive material, the thermally conductive material being nonmetallic

Methodology Applied
Scientific EffectElectrical insulation: Electrical Resistance

Data Source

PatentUS8969171B2Method of making deep trench, and devices formed by the method
Publication Date: 2015.03.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8969171B2 patent drawing
  • US8969171B2 patent drawing
  • US8969171B2 patent drawing

AI summary

A method for forming a semiconductor device includes providing a semiconductor-on-insulator (SOI) structure, and forming at least one hard mask (HM) layer over the SOI structure. The SOI structure includes an insulator layer and a semiconductor layer over the insulator layer. The method further comprises forming a trench inside the at least one HM layer and the semiconductor layer, and depositing a spacer layer in the trench. The spacer layer comprises a bottom surface portion over the bottom surface of the trench, and a side wall portion along the side wall of the trench. The method further comprises etching the bottom surface portion of the spacer layer while the side wall portion of the spacer layer remains, and etching the insulator layer to extend the trench into the insulator layer.