Deep Trench Isolation Layout for Tighter STI Spacing Control
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Solution Overview
Problem
Shallow trench isolation (STI) thermal processing leads to lateral diffusion of deep doped region dopants, making it difficult to control the spacing between isolation structures and transistors, resistors, and other component structures in semiconductor dies, which hinders the reduction of device size and increase in circuit density.
Innovation Solution
The implementation of a deep trench structure formed through a shallow trench isolation (STI) layer, with a dielectric liner and polysilicon filling the trench, decouples the deep doped region's lateral size from STI structure creation, allowing for closer spacing of transistors and other components, and facilitating reduced device size and increased circuit density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shallow trench isolation (STI) thermal processing is performed, then electrical isolation between circuits is achieved, but lateral diffusion of deep doped region dopants occurs making it difficult to control spacing between isolation structures and component structures
Solution Approach 1:
The isolation structure is divided into two distinct parts: shallow trench isolation (STI) for electrical isolation and deep trench isolation (DTI) for spacing control. The STI provides the necessary electrical isolation between circuits, while the separate DTI structures are formed to precisely control the spacing between isolation structures and component structures without being affected by STI thermal processing-induced dopant diffusion.
Solution Approach 2:
Deep trench isolation structures are introduced as intermediary elements between the STI structures and the component structures. These DTI structures act as mediators that define the spacing boundaries, allowing precise control over the distance between isolation structures and components while the STI performs its electrical isolation function independently.
2Manufacturing precision
If deep trench isolation is formed to control spacing, then spacing precision is improved, but device size increases reducing circuit density
Solution Approach 1:
The deep trench isolation structures are selectively formed only in specific locations where spacing control is required, rather than uniformly across the entire device. This localized approach allows precise spacing control at critical interfaces between isolation structures and component structures, while minimizing the overall area occupied by DTI structures, thus preserving circuit density.
3Manufacturing precision
If STI and DTI are formed in separate processes, then spacing control is improved, but manufacturing complexity increases
Solution Approach 1:
The formation of deep trench isolation structures is merged with the existing shallow trench isolation process flow. The DTI structures are formed using the STI process steps (trench etching, dielectric deposition, and planarization) that are already in place, thereby integrating the spacing control function into the existing manufacturing process without requiring completely separate process equipment or methodologies, thus limiting the increase in manufacturing complexity.
Data Source
AI summary
An electronic device includes a semiconductor substrate and a semiconductor surface layer having a first conductivity type, as well as a buried layer, a deep trench structure and a shallow trench isolation structure, the semiconductor surface layer over the semiconductor substrate and having a top surface, the buried layer having an opposite second conductivity type between the semiconductor surface layer and the semiconductor substrate, the deep trench structure including a trench that extends through the semiconductor surface layer and into the buried layer, a dielectric liner on a sidewall of the trench from the semiconductor surface layer to the buried layer, and polysilicon that extends on the dielectric liner and fills the trench to the side of the semiconductor surface layer, the shallow trench isolation structure extends into the semiconductor surface layer, and the shallow trench isolation structure in contact with the deep trench structure.