Semiconductor Defect Isolation via Over-Etched Scribe Lines

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Solution Overview

Problem

Systemic defects outside unsingulated dice in semiconductor wafers, such as polysilicon over-etching, impede testing and lead to reduced yield and reliability due to potential short circuits, as only some dice are usable in products.

Innovation Solution

Incorporating specialized conductive traces that are tailored to be more vulnerable to over-etching, acting as disconnect links to isolate defective circuits and prevent short circuits, thereby ensuring that good dice can be tested and identified before singulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single photo-mask is used with a stepper to create multiple reticles containing unsingulated dice, then manufacturing efficiency is improved, but systemic defects outside individual dice impede testing and reduce yield

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidtesting reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent divides the reticle into multiple independent die regions separated by scribe lines. Each die is electrically isolated from others through these scribe lines, which are etched to create physical and electrical separation. This segmentation allows individual testing of each die without interference from neighboring defective areas, resolving the contradiction between manufacturing efficiency (multiple dice per reticle) and testing reliability (isolation from systemic defects).

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The scribe lines act as intermediary elements between adjacent dice. These scribe lines are specifically designed with etch features that create deep trenches or complete separations, serving as mediators that block the propagation of systemic defects (such as polysilicon over-etching) from one die to another. This intermediary structure enables efficient batch manufacturing while maintaining testing reliability through defect isolation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of stationary object

If partial reticles are exposed at wafer edge to maximize die utilization, then area utilization is improved, but defects outside unsingulated dice cause short circuits and reduce yield

Engineering Contradiction:
Improvearea utilizationVSAvoidyield
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent implements segmentation through scribe lines that completely separate adjacent dice even at wafer edges. These scribe lines create electrical isolation barriers that prevent defects in partially exposed reticles from affecting neighboring good dice. This allows maximum area utilization including edge regions while maintaining yield through effective defect segmentation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by making scribe lines in specific locations (between dice and at wafer edges) have enhanced etch features compared to regular circuit features. These localized modifications create deeper trenches or complete separations only where needed for isolation, enabling area maximization while providing targeted defect isolation where systemic defects are most likely to propagate.

Inventive Principle:
Principle #3Local quality

3Reliability

If specialized conductive traces are made more vulnerable to over-etching to isolate defects, then defect isolation is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedefect isolationVSAvoidetch control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes parameters of conductive traces by modifying their width, material composition, or etch resistance properties in specific regions (scribe lines). These parameter changes make the traces more vulnerable to over-etching, allowing them to be selectively removed or isolated when defects occur. This enables improved defect isolation while the parameter changes are designed to work within existing manufacturing precision capabilities rather than requiring tighter controls.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7667231B2Automatic on-die defect isolation
Publication Date: 2010.02.23 IMPINJ
  • US7667231B2 patent drawing
  • US7667231B2 patent drawing
  • US7667231B2 patent drawing

AI summary

Microcircuits may include polysilicon features that are vulnerable to defects due to undesirable phenomena during manufacturing processes such as, inter alia, over-etching. The same phenomena that may cause defects can be exploited to automatically isolate the affected circuit and thus limit the harm caused by defects or incipient defects.