Semiconductor Defect Location Screening for Targeted Wafer Inspection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor fabrication processes face challenges in efficiently examining submicron features and defects on semiconductor wafers due to the need for high precision and uniformity, particularly in automating the detection and classification of defects during the fabrication of ultra-large scale integration devices.
Innovation Solution
A system utilizing processor and memory circuitry to obtain images of semiconductor specimens, determine areas of suspected defects based on data correlation and thickness, and selectively inspect these areas using examination tools, optimizing the examination process by prioritizing areas with high defect probability and efficiently managing low-speed high-resolution tools for small structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If automated examination of entire semiconductor wafers is performed using low-speed high-resolution tools, then defect detection precision is improved, but examination time and cost increase significantly
Solution Approach 1:
The patent divides the semiconductor wafer into multiple regions and processes them in sequential steps. First, a preliminary examination identifies suspicious areas, then a second examination focuses only on those specific regions using the high-resolution tool. This segmentation allows the system to maintain high detection precision while reducing overall examination time by avoiding exhaustive scanning of the entire wafer.
Solution Approach 2:
The patent performs a preliminary examination using lower-resolution or faster scanning methods to identify suspicious areas before conducting the detailed high-resolution examination. This preliminary action filters out most of the wafer surface, so that the time-consuming high-resolution tool only needs to examine a small fraction of the total area, thereby resolving the time-precision contradiction.
2Manufacturing precision
If low-speed high-resolution examination tools are used for small structures, then manufacturing precision is improved, but productivity decreases
Solution Approach 1:
The patent applies different examination qualities to different regions of the wafer. Suspicious areas identified in the first examination receive high-resolution local quality examination, while the rest of the wafer receives minimal or no high-resolution scanning. This local quality approach maintains manufacturing precision for critical areas while improving overall productivity by avoiding exhaustive high-resolution scanning everywhere.
Solution Approach 2:
Instead of performing complete high-resolution examination on the entire wafer, the patent applies partial action by limiting the high-resolution examination only to suspicious areas that require such detailed inspection. This partial application of the high-resolution tool maintains necessary manufacturing precision while significantly improving examination throughput and productivity.
3Reliability
If comprehensive defect classification is performed on all areas, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent performs preliminary defect classification and filtering in the first examination step, identifying only suspicious areas that require detailed analysis. This preliminary action reduces the volume of data requiring complex classification algorithms, thereby maintaining reliability for critical defects while reducing the overall system complexity by avoiding comprehensive classification of every wafer region.
Data Source
AI summary
There is provided a method and a system configured to obtain an image of a one or more first areas of a semiconductor specimen acquired by an examination tool, determine data Datt informative of defectivity in the one or more first areas, determine one or more second areas of the semiconductor specimen for which presence of a defect is suspected based at least on an evolution of Datt, or of data correlated to Datt, in the one or more first areas, and select the one or more second areas for inspection by the examination tool.