Defect-Trapping Mask for Selective Epitaxial Growth
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Solution Overview
Problem
The heteroepitaxial growth of dissimilar semiconductor materials often results in misfit defects due to lattice mismatch, leading to poor material quality and performance in semiconductor devices like diodes and transistors, as these defects introduce strain and degrade electrical and optical properties.
Innovation Solution
A defect-trapping mask with specific hard mask patterns is used to trap misfit defects outside channel forming regions, allowing for the growth of defect-free semiconductor material within these regions through selective epitaxial growth, thereby reducing dislocation defects and improving material quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If heteroepitaxial growth is performed to grow dissimilar semiconductor materials, then the functionality and performance of semiconductor devices are improved, but misfit defects are generated due to lattice mismatch
Solution Approach 1:
The substrate surface is segmented into channel forming regions and non-channel forming regions using selective masking techniques. This segmentation allows defects to be confined to non-channel regions while maintaining high material quality in channel regions, thus resolving the contradiction between achieving heteroepitaxial growth functionality and maintaining material quality.
Solution Approach 2:
Different quality requirements are applied to different regions: channel forming regions require defect-free high-quality material for device performance, while non-channel forming regions can tolerate defects. This local quality approach allows heteroepitaxial growth to proceed with acceptable overall quality while maintaining high functionality in critical regions.
2Power
If heteroepitaxial growth is performed to increase computing power, then the performance of semiconductor devices is improved, but threading dislocations are generated that terminate at the surface
Solution Approach 1:
Threading dislocations are extracted or removed from the channel forming regions through selective growth techniques. By confining dislocation generation to non-channel regions and preventing their propagation into channel regions, the reliability of devices is maintained while still enabling high-performance heteroepitaxial structures.
Solution Approach 2:
The lattice mismatch that causes dislocations is converted from a harmful factor into a beneficial one by directing dislocation formation to non-channel regions. The strain energy from lattice mismatch is harnessed to generate defects in sacrificial areas, thereby protecting the channel regions from dislocation damage and enabling high-performance devices.
3Stress or pressure
If misfit defects are allowed to form at the mismatched interface, then strain is relieved, but the electrical and optical properties are degraded
Solution Approach 1:
Strain relief through misfit defect formation is allowed in non-channel forming regions where it does not affect device performance, while channel forming regions maintain strain management to preserve electrical and optical properties. This spatial differentiation resolves the contradiction between strain relief and property preservation.
Solution Approach 2:
Non-channel forming regions act as intermediary zones that absorb strain and accommodate misfit defects, protecting the channel forming regions from strain-induced degradation. These intermediary regions serve as buffer zones that mediate between the lattice mismatch stress and the sensitive device structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach significantly decreases defects in semiconductor material grown in channel forming regions, enhancing the electrical characteristics and performance of semiconductor devices while enlarging the process window for selective epitaxial growth.
Implementation Method 1
A semiconductor layer is formed on the substrate by a selective epitaxial growth process
Data Source
AI summary
A semiconductor device includes a substrate and a semiconductor layer. The substrate includes a planar portion and a plurality of pillars on a periphery of the planar portion. The pillars are shaped as rectangular columns, and corners of two of the pillars at the same side of the planar portion are aligned in a horizontal direction or a direction perpendicular to the horizontal direction. The semiconductor layer is disposed over the planar portion and between the pillars.