Defense Layer with Mismatched Lattice Constants for Semiconductor Thinning Protection

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Solution Overview

Problem

Modern semiconductor devices are vulnerable to physical attacks and reverse engineering techniques such as thinning, which can compromise their structural and electrical integrity, as existing protection methods are inadequate in preventing unauthorized access or modification.

Innovation Solution

Incorporating defense layers with mismatched lattice constants that exert destabilizing forces, which are initially restrained to maintain the integrity of the semiconductor device, but break under abnormal thinning attacks, thereby protecting the device's internal structure and functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If defense layers with mismatched lattice constants are incorporated into the semiconductor device, then protection against thinning attacks is improved, but device complexity increases

Engineering Contradiction:
Improveprotection against thinning attacksVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The defense layer is nested within the existing semiconductor device structure, incorporating protective functionality into the device itself rather than adding external protection mechanisms. The defense layer with mismatched lattice constants is integrated between existing device layers, providing anti-thinning protection while maintaining a compact structure.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The invention changes the lattice constant parameter of the defense layer to be mismatched with adjacent layers. This parameter change creates internal stress that causes the defense layer to break when the device is thinned, providing a detectable indication of thinning attacks while protecting the device's intellectual property.

Inventive Principle:
Principle #35Parameter changes

2Difficulty of detecting and measuring

If defense layers are designed to break under thinning attacks, then detection of unauthorized access is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedetection of thinning attacksVSAvoidmanufacturing precision
Core Design Contradiction:
Difficulty of detecting and measuringVSManufacturing precision

Solution Approach 1:

The defense layer is pre-configured with mismatched lattice constants that create internal stress, preparing it in advance to break when subjected to thinning attacks. This preliminary setup ensures that the layer will automatically respond to unauthorized thinning attempts without requiring additional detection systems or post-manufacturing adjustments.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents unauthorized access and modification by ensuring that the defense layers remain intact under normal conditions while breaking under thinning attacks, thus safeguarding the semiconductor device's integrity and functionality.

Implementation Method 1

one or more defense layers, the one or more defense layers each characterized by at least two lattice constants that are mismatched, wherein a mismatch in the lattice constants causes a destabilizing force

Methodology Applied
Scientific EffectLattice constant mismatch:

Implementation Method 2

a mismatch in the lattice constants causes a destabilizing force that comprises at least one of: a tensile force or a compressive force

Methodology Applied
Scientific EffectMechanical force: Mechanical Force

Data Source

PatentUS9818871B1Defense layer against semiconductor device thinning
Publication Date: 2017.11.14 CISCO TECHNOLOGY INC
  • US9818871B1 patent drawing
  • US9818871B1 patent drawing
  • US9818871B1 patent drawing

AI summary

In one embodiment, a semiconductor device comprises one or more defense layers, the one or more defense layers each characterized by at least two lattice constants that are mismatched, wherein a mismatch in the lattice constants causes a destabilizing force that comprises at least one of a tensile force or a compressive force; and a plurality of other layers, wherein at least a sufficient part of the destabilizing force is restrained for the one or more defense layers to remain intact unless reduction in thickness of at least a section of one or more of the plurality of other layers, causes at least some of the destabilizing force that was restrained to no longer be restrained, and consequently at least part of at least one of the one or more defense layers to break.