Deglitching Circuit With Edge Delay Filters for Stable Transitions
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Digital logic signals are often corrupted by glitches, causing misinterpretation in receiving circuits due to transient signal changes that do not persist for sufficient time periods.
Innovation Solution
A deglitching circuit comprising delay filters, comparators, an inverter, an OR gate, and a latch is used to filter out glitches by requiring signal changes to persist for a minimum deglitching period before being propagated, ensuring that only stable transitions are passed through, thereby reducing the likelihood of signal misinterpretation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a deglitching circuit is implemented to filter out glitches, then signal reliability is improved, but device complexity increases
Solution Approach 1:
The deglitching circuit is divided into separate functional modules: delay filters for rising and falling edges, comparators for threshold detection, an OR gate for combining signals, and a latch for output control. Each module performs a specific function in the glitch filtering process, making the overall system more manageable and maintainable while achieving reliable glitch rejection
Solution Approach 2:
Delay filters are introduced as intermediary elements between the input signal and the comparators. These delay filters temporarily hold the signal transitions, allowing the circuit to distinguish between genuine signal changes and transient glitches based on the duration of the delayed signal, thereby improving reliability without requiring complex real-time analysis
2Reliability
If delay filters are used to filter glitches, then glitch rejection is improved, but signal delay increases
Solution Approach 1:
Different delay characteristics are applied locally to different signal edges. The circuit uses separate delay filters for rising edges and falling edges, allowing each path to be optimized for its specific transition type. This localized approach ensures adequate glitch rejection for each edge type while minimizing unnecessary delay in paths where it is not required
Solution Approach 2:
The circuit dynamically responds to signal transitions by activating delay filtering only when edge transitions are detected. The latch mechanism ensures that once a valid transition is confirmed after the delay period, subsequent processing occurs without additional delay, making the time penalty for glitch rejection variable rather than constant
3Measurement precision
If multiple comparators and delay filters are used, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The detection function is segmented into multiple specialized comparators, each responsible for detecting specific signal conditions. The first comparator detects rising edge transitions while the second comparator detects falling edge transitions. This segmentation allows each comparator to be optimized for its specific detection task, improving overall measurement precision while keeping individual comparator circuits relatively simple
Data Source
AI summary
A circuit includes a first delay filter, a first comparator, an inverter, a second delay filter, a second comparator, an OR gate, and a latch. A first delay filter input is coupled to an inverter input. The first comparator has a first comparator input coupled to a first delay filter output and a second comparator input. The second delay filter has an input coupled to an inverter output. The second comparator has a third comparator input coupled to a second delay filter output, and a fourth comparator input coupled to the second comparator input. The OR gate has an input coupled to a first comparator output and another input coupled to a second comparator output. The latch has a clock input coupled to an OR gate output and a latch input coupled to the inverter input. A latch output provides a deglitched signal.