Degradation-Aware Training for Reliable Memristor Deep Learning Accelerators

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Solution Overview

Problem

The reliability and energy efficiency of memristor-based deep learning accelerators are compromised due to degradation (aging) of memory cells, which affects the performance and accuracy of neural networks.

Innovation Solution

A degradation-aware training scheme is implemented using a model that emulates degradation in memristor crossbars, adjusting conductance matrix and current values dynamically to maintain accuracy and efficiency, incorporating a CAD approach to devise a highly reliable and energy-efficient memristor crossbar-based deep learning system design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If traditional CPU/GPU are used for deep learning processing, then computational flexibility is maintained, but energy efficiency deteriorates due to processor-memory speed gap

Engineering Contradiction:
Improveenergy efficiencyVSAvoidcomputational reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent replaces traditional CPU/GPU computational systems with a memristor-based in-memory computing system. This substitution eliminates the processor-memory speed gap by performing computations directly within the memory array, achieving superior energy efficiency (up to 1000x improvement) while maintaining computational functionality through analog conductance states that represent neural network weights.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The memristor crossbar array serves multiple functions simultaneously: it acts as both memory storage and processing unit. The same hardware structure performs both weight storage (via conductance states) and matrix multiplication operations (via Ohm's law and Kirchhoff's current law), eliminating the need for separate processor and memory components and thereby improving energy efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Use of energy by moving object

If memristor-based accelerators are used to improve energy efficiency, then energy consumption is reduced, but reliability deteriorates due to memory cell degradation

Engineering Contradiction:
Improveenergy efficiencyVSAvoidmemory cell reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent implements dynamic adaptation by continuously monitoring the conductance states of memristor cells and adjusting the mapping of neural network weights in real-time. When degradation is detected (conductance drift beyond threshold), the system dynamically remaps weights to alternative memory cells, ensuring continuous reliable operation without requiring static, over-engineered margins.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system incorporates feedback mechanisms that monitor the health and conductance stability of individual memristor cells during operation. This feedback enables the control logic to detect degradation early and trigger remapping operations, creating a closed-loop system that maintains reliability despite the inherently unstable nature of memristor devices.

Inventive Principle:
Principle #23Feedback

Solution Approach 3:

The patent changes the operational parameters of the memristor array by dynamically adjusting the mapping between neural network weights and physical memory cells. Instead of using fixed mappings, the system varies the parameter assignments based on real-time cell health status, allowing the same hardware to adapt to degradation and maintain computational accuracy.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If frequent writing operations are performed to maintain accuracy, then neural network accuracy is preserved, but memory cell degradation accelerates

Engineering Contradiction:
Improveneural network accuracyVSAvoidmemory array lifetime
Core Design Contradiction:
Measurement precisionVSDuration of action of stationary object

Solution Approach 1:

The patent applies local quality by treating each memristor cell individually based on its specific degradation state. Instead of uniformly reducing writing operations across the entire array, the system identifies specific cells that have degraded and applies remapping only to those localized regions, preserving accuracy for affected cells while minimizing unnecessary operations on healthy cells.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system accepts that individual memristor cells have limited lifetimes due to degradation from writing operations. Rather than attempting to preserve each cell indefinitely, the patent employs a pool of memory cells where degraded cells are retired and remapped to fresh cells, similar to a disposable resource model. This allows the system to maintain overall accuracy while individual cells are used until degradation becomes unacceptable.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS12374394B2Degradation-aware training scheme for reliable memristor deep learning accelerator design
Publication Date: 2025.07.29 RGT UNIV OF CALIFORNIA
  • US12374394B2 patent drawing
  • US12374394B2 patent drawing
  • US12374394B2 patent drawing

AI summary

A method, a system, and computer program product for degradation-aware training of neural networks are provided. A degradation of degraded memory cells of a memory array is detected, during a training of a neural network. A first set of writing parameter values to be applied to the one or more degraded memory cells and a second set of writing parameter values to be applied to the undegraded memory cells is determined using a model of the memory array tuned to account for the degradation of one or more memory cells. A writing operation is executed, by applying the first set of writing parameter values to the one or more degraded memory cells to compensate for the degradation of the one or more degraded memory cells and by applying the second set of writing parameter values to the undegraded memory cell.