Delay Block Optimizes Dead Time in Switching Voltage Regulators
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Solution Overview
Problem
Existing methods for controlling dead times in switched-mode DC-DC converters, particularly at high frequencies, fail to adapt quickly to varying temperatures, voltages, and currents, leading to inefficiencies due to shoot-through current and body diode conduction, especially in applications like WCDMA communications where rapid power adjustments are necessary.
Innovation Solution
The method involves peak-detection of the instantaneous time derivative of the switching node voltage to optimize both dead times (DT1 and DT2) through cycle-by-cycle response, allowing for fast calibration and minimizing switching losses, even at high frequencies above 10 MHz.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If fixed dead time values are used in high-frequency converters, then circuit simplicity is maintained, but efficiency degrades due to inability to adapt to varying temperatures, voltages, and currents
Solution Approach 1:
The control circuit automatically adjusts dead time values by detecting switching node voltage characteristics and computing optimal values, eliminating the need for external manual calibration or complex adaptive control systems. The system self-calibrates by monitoring its own operating conditions and adjusting parameters accordingly.
Solution Approach 2:
The patent dynamically changes dead time parameters based on detected switching node voltage characteristics. The control circuit computes optimal dead time values by analyzing voltage peaks and their timing, then adjusts the dead time parameters in real-time to adapt to varying temperatures, voltages, and currents.
2Reliability
If dead time is extended to prevent shoot-through current, then reliability improves, but efficiency deteriorates due to increased body diode conduction losses
Solution Approach 1:
The patent employs dynamic dead time adjustment where the dead time values are continuously optimized based on real-time detection of switching node voltage characteristics. This dynamic approach allows the system to maintain just enough dead time to prevent shoot-through while minimizing excess dead time that would cause body diode conduction losses.
Solution Approach 2:
The control circuit uses feedback from the switching node voltage detection to automatically adjust dead time values. By monitoring the voltage peaks and their timing during switching transitions, the system computes optimal dead time values that prevent shoot-through current while minimizing energy losses through body diode conduction.
3Productivity
If conventional dead time control methods are used, then circuit simplicity is maintained, but productivity decreases due to slow adaptation to varying load conditions
Solution Approach 1:
The control circuit performs automatic dead time optimization by detecting switching node voltage characteristics and computing optimal values without requiring external intervention or complex adaptive control systems. This self-service capability enables rapid adaptation to varying load conditions while keeping the control circuit relatively simple.
Solution Approach 2:
The system performs preliminary detection of switching node voltage peaks and their timing to compute optimal dead time values before actual switching operations. This preliminary action allows the control circuit to pre-optimize dead time settings for upcoming switching cycles, enabling fast response to varying load conditions.
Data Source
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AI summary
Embodiments for at least one method and apparatus for controlling timing of switch control signals of a switching voltage regulator disclosed. One method includes generating a regulated output voltage based upon a switching voltage, generating the switching voltage through controlled closing and opening of a series switch element and a shunt switch element, and controlling, by a delay block, the closing and opening of the series switch element and a shunt switch element. The delay block control includes receiving, by the delay block, a timing signal, generating a one of a series switch control signal and a shunt switch control signal by controllably delaying the timing signal with a first delay, and generating one other of the series switch control signal and the shunt switch control signal by inverting, and controllably delaying the timing signal with a second delay.