Direct Delay Calibration Loop for Low-Power Accurate Timing
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Solution Overview
Problem
Existing delay locked loop (DLL) approaches in digital circuit designs face challenges with high power consumption and limited delay accuracy due to inherent errors and the need for redundant circuit elements, especially in mobile devices and high-density data centers.
Innovation Solution
The implementation of direct measurement delay calibration, where delay elements are calibrated in a loop during periods of inactivity, allowing for dynamic adaptation to changes and precise delay settings, eliminating the need for an always-on DLL master and reducing the number of redundant elements, thereby reducing power consumption and improving accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If delay locked loop (DLL) is used to provide delays, then delay functionality is achieved, but power consumption increases and delay accuracy decreases
Solution Approach 1:
The patent extracts and removes the DLL master component from the system, retaining only the delay elements and calibration circuitry. This eliminates the power-consuming master that generates clock signals, while preserving the delay functionality through direct measurement and calibration of the remaining delay elements.
Solution Approach 2:
The patent performs delay calibration in advance during idle periods before actual data transmission begins. By pre-calibrating the delay elements using a loopback method and storing the calibration results, the system avoids needing continuous DLL operation, thereby reducing power consumption while maintaining delay accuracy.
2Measurement precision
If DLL master and slave configurations are used, then delay control is achieved, but measurement errors are introduced
Solution Approach 1:
Instead of using the traditional DLL master-slave configuration where the master generates clocks and slaves provide delays, the patent inverts the approach by using a loopback method where delay elements are calibrated by feeding their output back to their input. This direct measurement eliminates the measurement errors inherent in master-slave configurations.
Solution Approach 2:
The patent implements a feedback-based calibration mechanism where the output of delay elements is fed back to their input through a loopback path. This feedback allows direct measurement of the actual delay introduced by each element, enabling precise calibration without the errors associated with separate master and slave components.
3Adaptability or versatility
If DLL approach is implemented, then delay functionality is provided, but redundant circuit elements increase device complexity
Solution Approach 1:
The patent removes redundant circuit elements by extracting only the essential delay elements and calibration circuitry, eliminating the DLL master, phase detectors, and other components unnecessary for the simplified delay implementation. This reduces device complexity while maintaining delay adjustment capability through direct calibration.
Data Source
AI summary
Disclosed are methods and apparatuses for providing direct measurement delay calibration. An apparatus may include a plurality of delay elements in a loop. The apparatus may also include a controller coupled to the plurality of delay elements. The controller may be configured to cause determining, for a predetermined time period, delay oscillations from the plurality of delay elements in the loop. The controller may also be configured to cause determining, based on the determined delay oscillations, the predetermined time period, and a quantity of the plurality of delay elements, a subset of the plurality of delay elements for delaying an input signal. The controller may also be configured to cause routing the input signal through the subset of the plurality of delay elements.