Delay Calibration for Stepped Frequency Continuous Wave Digital Signal Chains

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Solution Overview

Problem

SFCW systems face challenges in selecting digital samples with valid data due to factors like PVT variations, transmitter switches, and channel effects, which affect the quality and robustness of data capture in digital signal processing.

Innovation Solution

A method for delay calibration is implemented, involving receiving a burst with a test pulse, computing moving averages for digital samples, identifying the closest expected amplitude, and updating delays to accurately select valid data samples for further processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If digital samples are captured immediately after burst transmission, then data capture speed is improved, but measurement precision deteriorates due to invalid samples from transmitter switch and settling time

Engineering Contradiction:
Improvedata capture speedVSAvoidamplitude and phase determination accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The system performs delay calibration in advance by capturing test bursts, computing moving averages, and identifying the optimal delay value that maximizes amplitude before actual measurement. This preliminary calibration establishes the correct timing offset to exclude invalid samples from transmitter switching and settling effects, ensuring both fast data capture and high measurement precision during operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from the computed amplitude of moving averages to determine the optimal delay value. By monitoring how amplitude varies with different delay settings and selecting the delay that produces maximum amplitude (indicating proper alignment with valid signal samples), the system automatically adjusts timing to achieve optimal measurement precision while maintaining high data capture speed.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If delay calibration is performed to compensate for PVT variations and channel effects, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvedata capture accuracyVSAvoidsignal processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system performs self-calibration by using its own test burst signals and processing chain to automatically determine the optimal delay value. The calibration process utilizes the system's existing components (ADC, mixer, moving averager) to capture test signals, compute amplitudes for different delay values, and identify the optimal setting without requiring external calibration equipment or complex additional hardware, thus achieving high measurement precision with minimal added complexity.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system compensates for PVT variations and channel effects by dynamically adjusting the delay parameter based on measured amplitude responses. By changing the delay parameter to optimize amplitude measurement and using this calibrated delay for subsequent measurements, the system adapts to environmental variations and hardware differences, achieving high measurement precision through parameter optimization rather than complex hardware design.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11550029B2Delay calibration for a stepped frequency continuous wave digital signal chain
Publication Date: 2023.01.10 ANALOG DEVICES INT UNLTD CO
  • US11550029B2 patent drawing
  • US11550029B2 patent drawing
  • US11550029B2 patent drawing

AI summary

Delay calibration for digital signal chains of SFCW systems is disclosed. An example calibration method includes receiving a burst with a test pulse, the burst having a duration of L clock cycles; receiving a trigger indicative of a time when the burst was transmitted; generating a digital signal indicative of the received burst; for each of L clock cycles, computing a moving average of a subset of digital samples and an amplitude for each average; identifying one moving average for which the computed amplitude is closest to an expected amplitude; identifying the clock cycle of the identified moving average; and updating at least one delay to be applied in digital signal processing of received bursts based on a difference between the trigger and the identified clock cycle. The delay may be used for selecting digital samples of the received signal that contain valid data for performing further data processing.