Delay Chain Calibration Using TDC-Based Element Matching
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Solution Overview
Problem
Delay mismatch between individual elements in delay chain circuits degrades the accuracy of applications relying on these circuits, such as phase interpolators and clock multipliers, due to practical effects like layout matching, temperature drift, and flicker noise.
Innovation Solution
A system and method that uses a time-to-digital converter to measure and equalize the delays of individual delay elements in a delay chain by iteratively adjusting them until they match, utilizing a multiplexer and a time amplifier to provide relative delay measurements, which allows for accurate matching without requiring high-resolution analog-to-digital converters or external calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If feedback control using a DLL is applied to keep the total delay of the delay chain constant, then the overall delay stability is improved, but the delays of each individual delay element remain mismatched due to practical effects like layout matching, temperature drift and flicker noise
Solution Approach 1:
The patent divides the delay chain into individual delay elements and measures each element's delay separately using a time-to-digital converter. By segmenting the measurement process, the system can identify and correct mismatches at the individual element level while maintaining overall delay stability through feedback control.
Solution Approach 2:
The patent implements a feedback mechanism where the measured delay values of individual elements are used to adjust control signals for each delay element. This feedback loop continuously compensates for mismatches caused by layout variations, temperature drift, and flicker noise, ensuring both individual element matching and overall delay stability.
2Measurement precision
If high-resolution analog-to-digital converters are used to achieve accurate delay measurements, then measurement precision is improved, but device complexity and cost increase
Solution Approach 1:
The patent introduces a time-to-digital converter as an intermediary device that converts time delay measurements into digital values. This intermediary approach enables accurate delay measurement without requiring high-resolution analog-to-digital converters, thereby reducing device complexity while maintaining measurement precision.
Solution Approach 2:
The patent replaces complex analog measurement systems with a digital-based time-to-digital conversion approach. By substituting mechanical/analog high-resolution ADCs with a digital timing and counting system, the invention achieves accurate delay measurement with reduced complexity and improved integration compatibility.
3Measurement precision
If external calibration equipment is used to equalize delay elements, then delay matching accuracy is improved, but ease of manufacture and operational simplicity deteriorate
Solution Approach 1:
The patent implements a self-calibration mechanism where the delay chain system measures and equalizes its own delay elements using an integrated time-to-digital converter and control logic. This self-service approach eliminates the need for external calibration equipment, simplifying manufacturing and operation while maintaining high delay matching accuracy.
Solution Approach 2:
The patent performs delay measurement and equalization as a preliminary action during the initialization or setup phase of the delay chain. By pre-calibrating the delay elements before operation, the system achieves accurate delay matching without requiring complex external calibration equipment during manufacturing or operation.
Data Source
AI summary
In accordance with an embodiment a circuit includes: a plurality of delay elements coupled in series, each delay element including an input node and an output node; a multiplexer having inputs coupled to the output node of each delay element of the plurality of delay elements; and a time measurement circuit including a time amplifier having an input coupled to an output of the multiplexer, and a counter coupled to an output of the time amplifier.