Voltage-Independent Delay Circuit Using Proportional Charging Current
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Solution Overview
Problem
Conventional delay circuits exhibit varying delay times in response to changes in input signal voltage levels, leading to instability and increased circuit complexity, including the need for additional components like comparators and bias circuits, which result in larger area and higher power consumption.
Innovation Solution
A delay circuit design incorporating a voltage/current conversion unit and an output logic unit, where the current generated is proportional to the input signal voltage, and an output logic unit, such as an inverter or series-connected inverters, ensures a constant delay time independent of input signal voltage levels, eliminating the need for comparators and bias circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional RC delay circuit is used, then the circuit is simple, but the delay time varies with input signal voltage level
Solution Approach 1:
The patent changes the operating parameters of the transistor by utilizing its square-law characteristic region, where the drain current is proportional to the square of the gate-source voltage. By designing the circuit such that the capacitor charging current follows this square-law relationship, the delay time becomes independent of the input voltage level, thus improving delay time stability while maintaining circuit simplicity.
2Reliability
If a comparator-based delay circuit is used, then the delay time is fixed, but the circuit area and power consumption increase
Solution Approach 1:
The patent extracts and eliminates the comparator component from the conventional delay circuit design. Instead of using a comparator to detect voltage thresholds, the invention directly utilizes the transistor's square-law characteristic to generate a charging current that naturally produces a voltage-time relationship independent of input voltage, thereby achieving fixed delay time without requiring additional comparator circuits and reducing overall circuit area.
Solution Approach 2:
The circuit employs the transistor's inherent square-law characteristic to automatically generate the appropriate charging current without external control circuits. The transistor itself serves the dual function of voltage-to-current conversion and delay generation, making the circuit self-sufficient and eliminating the need for separate comparator and bias circuits, thus reducing both area and power consumption.
3Reliability
If a comparator-based delay circuit is used, then the delay time is fixed, but the power consumption increases
Solution Approach 1:
The circuit employs the transistor's inherent square-law characteristic to automatically generate the appropriate charging current without external control circuits. The transistor itself serves the dual function of voltage-to-current conversion and delay generation, making the circuit self-sufficient and eliminating the need for separate comparator and bias circuits, thus reducing both area and power consumption.
Solution Approach 2:
The patent merges the functions of voltage-to-current conversion, delay generation, and voltage threshold detection into a single integrated circuit structure using the transistor's square-law characteristic. This consolidation eliminates the need for separate comparator circuits and bias circuits, thereby reducing the total power consumption while maintaining consistent delay time performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a delay circuit with a constant delay time, reduced chip area, lower power consumption, and simpler architecture, achieving a more cost-effective implementation while protecting loads from unstable voltage transitions.
Implementation Method 1
The voltage/current conversion unit is configured to convert the input signal to a current according to a first relationship, wherein the current is proportional to the voltage level of the input signal
Implementation Method 2
a capacitor, and an output logic unit. The voltage/current conversion unit is configured to receive an input signal and generate current based on a voltage level of the input signal
Data Source
AI summary
A delay circuit includes a voltage/current conversion unit, a capacitor, and an output logic unit. The voltage/current conversion unit receives an input signal and generates current based on a voltage level of the input signal, and the generated current is proportional to the voltage level of the input signal. The capacitor is electrically connected to the voltage/current conversion unit and configured to receive the current generated by the voltage/current conversion unit, to charge. The output logic unit is electrically connected to the capacitor configured to receive a voltage signal on a terminal of the capacitor and generate an output signal based on the voltage signal, a delay time between a transition time point of the input signal and a transition time point of the output signal is not related to the voltage level of the input signal.