Delay Element Gain Calibration Using Phase Detector Feedback

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing electronic devices face challenges in accurately calibrating the gain of delay elements, which are crucial for phase noise cancellation and maintaining signal integrity in wireless communication systems.

Innovation Solution

A method and apparatus for delay element gain calibration, involving a phase detector to compare input and output clock signals, and an accumulator to generate a calibration output signal, allowing for precise adjustment of the delay element's gain control signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If delay element gain calibration is performed using conventional methods, then calibration can be achieved, but the calibration process is slow and inaccurate

Engineering Contradiction:
Improvecalibration accuracyVSAvoidcalibration settling time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements a feedback mechanism where the phase detector continuously monitors the phase difference between input and output clock signals and feeds this information back to the accumulator. The accumulator adjusts the delay element control signal based on this feedback, creating a closed-loop calibration system that converges quickly to the optimal gain value, thereby achieving both high accuracy and fast settling time.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent replaces conventional slow calibration mechanisms with a digital calibration approach using a phase detector and accumulator working in conjunction with a delay element. This substitution of the calibration mechanism enables faster and more precise gain calibration by using digital signal processing rather than traditional analog or mechanical calibration methods.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If delay element gain is not accurately calibrated, then phase noise cancellation is ineffective, but implementing calibration increases system complexity

Engineering Contradiction:
Improvephase noise cancellation effectivenessVSAvoidcalibration circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent designs the calibration circuit with multi-functional components that serve multiple purposes. The delay element can operate in both calibration mode and normal operation mode, and the phase detector serves both calibration and ongoing phase monitoring functions. This universality reduces the need for separate dedicated calibration components, thereby maintaining reliability while minimizing added complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The calibration system is designed to be self-calibrating through the automatic feedback loop. The phase detector automatically detects phase errors and the accumulator automatically adjusts the delay element control signal without requiring external intervention or complex control logic. This self-service capability ensures reliable phase noise cancellation while keeping the control system simple.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution enables fast and accurate calibration of delay element gain, reducing phase noise and improving signal integrity in wireless communication systems, with a short settling time and high accuracy.

Implementation Method 1

comparing, via a phase detector (PD), the input clock signal and the output clock signal to generate a PD output signal

Methodology Applied
Scientific EffectPhase detection:

Implementation Method 2

accumulating, via a first accumulator, the PD output signal to generate a calibration output signal

Methodology Applied
Scientific EffectSignal accumulation:

Implementation Method 3

a delay element to generate an output clock signal by delaying an input clock signal

Methodology Applied
Scientific EffectTime delay:

Data Source

PatentUS20250141455A1Delay element gain calibration
Publication Date: 2025.05.01 QUALCOMM INC
  • US20250141455A1 patent drawing
  • US20250141455A1 patent drawing
  • US20250141455A1 patent drawing

AI summary

Certain aspects of the present disclosure are directed towards a method for delay element calibration. The method generally includes: incrementing a calibration delay control signal provided to a delay element to generate an output clock signal by delaying an input clock signal; comparing, via a phase detector (PD), the input clock signal and the output clock signal to generate a PD output signal; and accumulating, via a first accumulator, the PD output signal to generate a calibration output signal.