Delay Injection for Kernel Data Race Detection
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Solution Overview
Problem
Data race bugs are difficult to detect and reproduce due to their rarity and the complexity of kernel code synchronization methods, often resulting in false positives and missed issues during stress testing.
Innovation Solution
A method to determine shared memory access instructions, calculate their execution frequencies, and inject delays to increase the likelihood of triggering data race bugs by manipulating execution interleavings, focusing on infrequent and concurrent accesses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If systematic schedule exploration is used to exercise all access interleavings, then data race bugs can be detected, but modifying scheduling behavior for kernel code is much more difficult than for applications
Solution Approach 1:
The patent introduces a delay injection mechanism as an intermediary tool that indirectly manipulates execution timing without requiring direct modification of kernel scheduling behavior. By injecting artificial delays at strategic points in the code, the system achieves schedule exploration while avoiding the complexity of modifying kernel schedulers.
Solution Approach 2:
The patent performs preliminary analysis to identify shared memory access instructions and their execution frequencies before running the actual test. This allows the system to pre-calculate which instruction pairs are most likely to exhibit data races, so that delay injection can be focused on these high-probability candidates rather than exhaustively testing all possible interleavings.
2Reliability
If all shared memory accesses are reported as potentially buggy, then data race detection coverage is maximized, but the rate of false positives increases
Solution Approach 1:
The patent changes the parameters used to evaluate potential data races by incorporating execution frequency and time gap metrics. Instead of reporting all shared memory accesses as potentially buggy, the system calculates a probability score for each instruction pair based on how frequently they execute and the time gap between them, allowing prioritization of high-probability candidates.
Solution Approach 2:
The patent applies partial action by focusing delay injection efforts on a selected subset of instruction pairs that have the highest probability of exhibiting data races. Rather than exhaustively testing all possible shared memory access combinations, the system strategically targets the most promising candidates based on frequency and timing analysis.
3Reliability
If delay injection is performed on all instruction pairs, then data race triggering probability increases, but the computational overhead and testing time increase
Solution Approach 1:
The patent changes the approach from uniform delay injection across all instruction pairs to selective delay injection based on calculated probability scores. By using execution frequency and time gap as parameters, the system identifies and targets only those instruction pairs with the highest likelihood of exhibiting data races, thereby increasing triggering probability while minimizing testing overhead.
Data Source
AI summary
A method includes determining a set of shared memory access instructions and execution frequencies and selecting one or more groups of instructions that access a same memory location. The method also includes finding pairs of instructions from each group, for which another access to the same memory location may occur between execution of the instructions in the pair, and estimating a probability that a data race may occur using a time gap between the instructions and the execution frequencies, and generating a list of instruction tuples that include the pair of instructions. The method includes calculating a score for each instruction in the tuples, the score representing a likelihood of triggering a data race by injecting a delay before an instruction. The method includes selecting instructions having a score indicating a lower than a threshold probability that the instruction will comprise a last access of a data race.