Delay Interpolator With Edge-Specific Codes for PVT-Stable Timing
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Solution Overview
Problem
Existing delay circuits face challenges in precisely controlling the ratio of coarse to fine delay steps due to process voltage temperature (PVT) variations, leading to conversion errors when switching between coarse and fine delay adjustments.
Innovation Solution
A delay interpolator system that includes pull-up and pull-down devices controlled by separate delay codes, allowing for independent adjustment of rising and falling edges, which interpolates between two delayed signals to provide a fraction of the delay between them, thereby tracking changes in the coarse delay circuit's delay and maintaining precise control of the ratio across PVT variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a delay circuit uses fixed coarse and fine delay steps, then the circuit structure is simple, but the ratio control precision deteriorates due to PVT variations
Solution Approach 1:
The delay circuit transitions from fixed delay steps to dynamically adjustable delay steps. The coarse delay circuit and fine delay circuit both use controllable delay elements that can adjust their delay amounts based on control signals, allowing the ratio between coarse and fine delay steps to be dynamically optimized to maintain precision across PVT variations.
Solution Approach 2:
The patent changes the delay parameters of both coarse and fine delay circuits by introducing controllable delay elements. The delay amount of each circuit stage can be adjusted through control signals, enabling the system to compensate for PVT variations and maintain accurate delay ratio control.
2Reliability
If the delay circuit uses separate control for coarse and fine delay, then the delay ratio control is improved, but the conversion error increases when switching between delay modes
Solution Approach 1:
The delay circuit incorporates feedback mechanisms where the delay control circuit receives information about the current delay state and adjusts control signals accordingly. This feedback enables smooth transitions between coarse and fine delay modes, reducing conversion errors by anticipating and compensating for potential inaccuracies during mode switching.
Solution Approach 2:
The system performs preliminary adjustment actions before mode switching occurs. The delay control circuit prepares the delay elements in advance to ensure continuous and accurate delay output when transitioning between coarse and fine delay modes, preventing conversion errors.
Data Source
AI summary
A delay interpolator includes pull-up devices coupled between a supply rail and a node, pull-down devices coupled between the node and a ground, and a first control circuit coupled to the pull-up devices, wherein the first control circuit is configured to receive a first signal, a second signal, and a first delay code, input the first signal to a programmable number of the pull-up devices based on the first delay code, and input the second signal to remaining ones of the pull-up devices. The delay interpolator also includes a second control circuit coupled to the pull-down devices, wherein the second control circuit is configured to receive the first signal, the second signal, and a second delay code, input the first signal to a programmable number of the pull-down devices based on the second delay code, and input the second signal to remaining ones of the pull-down devices.