Delay Line Initialization Path Without Exit Tree Distortion

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Solution Overview

Problem

Standard delay lines with exit trees face issues of Duty Cycle Distortion and Power Supply Sensitivity due to additional gates in the forward path, and are incompatible with fast measure initialization, leading to longer initialization times and potential glitches.

Innovation Solution

A delay line structure with no exit tree, incorporating a measure initialization path that includes a forward path with series-coupled NAND pairs, and separate output paths with multiplexers or parallel NAND gates, allowing for precise delay determination and synchronization without additional delay or loading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a multi-layer exit tree structure is added to the delay line, then the delay line can output delayed signals, but the forward path delay increases and Duty Cycle Distortion worsens

Engineering Contradiction:
Improvesignal output capabilityVSAvoidDuty Cycle Distortion
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent removes the exit tree structure from the delay line, extracting the problematic multi-layer gating that caused duty cycle distortion. The delay line now consists only of the forward path with series-coupled NAND pairs, and signals are output directly from the last stage without passing through additional exit tree gates, thereby eliminating the source of duty cycle distortion while maintaining signal output capability.

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of operation

If a multi-layer exit tree structure is added to the delay line, then the delay line can output delayed signals, but Power Supply Sensitivity increases

Engineering Contradiction:
Improvesignal output capabilityVSAvoidPower Supply Sensitivity
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent removes the exit tree structure that introduced multiple layers of gating sensitive to power supply variations. By eliminating these additional gates from the forward path, the delay line becomes less sensitive to power supply noise and fluctuations, as the signal passes through fewer active components that could introduce sensitivity variations.

Inventive Principle:
Principle #2Taking out (Extraction)

3Manufacturing precision

If the exit tree is integrated into the delay line with common entry points, then forward path delay is reduced, but loading increases and new duty cycle issues are introduced

Engineering Contradiction:
Improveforward path delayVSAvoidloading
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The patent removes the integrated exit tree structure with common entry points that created excessive loading requirements. The delay line is simplified to consist only of the essential forward path delay elements, eliminating the need to power and manage additional common entry points, thereby reducing the overall loading on the system while maintaining the necessary delay functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

4Device complexity

If signal propagation is limited to one output buffer stage, then the delay line structure is simplified, but measure initialization time increases

Engineering Contradiction:
Improvestructure simplicityVSAvoidinitialization time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent implements dynamic control of the delay line stages using enable signals that can selectively activate different numbers of delay stages based on the required delay value. During measure initialization, all stages can be dynamically enabled to allow fast propagation through the entire delay line for accurate delay measurement, while during normal operation, only the necessary number of stages are activated. This dynamic staging approach enables both fast initialization and operational efficiency without requiring a complex multi-output buffer structure.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8901938B2Delay line scheme with no exit tree
Publication Date: 2014.12.02 NAN YA TECH
  • US8901938B2 patent drawing
  • US8901938B2 patent drawing
  • US8901938B2 patent drawing

AI summary

A measure initialization path for a delay line structure includes: a forward path, comprising a plurality of delay stages coupled in series; a first output path coupled to at least an output of a delay stage of the forward path, where at least an output of a delay stage is fed forward to the forward path; and a second output path coupled to at least an output of a delay stage of the forward path, where at least an output of a delay stage is fed forward to the forward path. When a signal is propagated through the measure initialization path, the signal successively propagates through a delay stage of the forward path, a delay stage of the first output path and a delay stage of the second output path for performing measure initialization.