Delay-Line Pulse Generator for Precise Width Control

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Solution Overview

Problem

Traditional pulse signal generation methods are inefficient in terms of power and circuit area, as they rely on high-speed clocks or large-area consuming solutions, leading to inaccurate pulse widths and potential errors in digital circuit operations.

Innovation Solution

A width-controllable pulse generator using a delay line with multiple stages, where the per-stage delay is measured and utilized to generate pulses of precise width, independent of the input clock frequency, allowing for accurate small pulse width generation without the need for power-consuming fast clocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional high-speed clock methods are used for pulse generation, then pulse width accuracy is improved, but power consumption increases

Engineering Contradiction:
Improvepulse width accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The pulse generation function is segmented into multiple delay stages, where each stage contributes a specific delay portion. By selecting and combining outputs from different stages, the desired pulse width is achieved without requiring a high-speed clock, thus reducing power consumption while maintaining accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A delay line is introduced as an intermediary element between the clock signal and the pulse output. The delay line converts the clock signal into delayed versions that can be combined to generate precise pulse widths, eliminating the need for high-speed clock operation and reducing power consumption.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If traditional high-speed clock methods are used for pulse generation, then pulse width accuracy is improved, but circuit area increases

Engineering Contradiction:
Improvepulse width accuracyVSAvoidcircuit area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The circuit is segmented into multiple delay stages connected in series, forming a delay line. This segmentation allows the use of simple, small-area delay elements rather than requiring a large-area high-speed clock circuit, achieving pulse width accuracy with minimal area overhead.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The delay line serves multiple functions: it generates delayed clock signals, provides selectable pulse widths through different stage combinations, and eliminates the need for separate high-speed clock generation circuitry. This multi-functionality reduces the overall circuit area while maintaining pulse width accuracy.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If fixed pulse width generation is used, then circuit complexity is reduced, but adaptability decreases

Engineering Contradiction:
Improvecircuit complexityVSAvoidpulse width adjustability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The pulse generation circuit is made dynamic by allowing selection of different delay stage combinations based on the desired pulse width. The system can adapt to different pulse width requirements by selectively activating appropriate stages, providing versatility without significantly increasing circuit complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The delay line is pre-configured with multiple stages that provide predetermined delay values. This preliminary arrangement of delay stages allows for rapid adaptation to different pulse width requirements without requiring complex real-time adjustment mechanisms, maintaining low circuit complexity while achieving high adaptability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11539354B2Systems and methods for generating a controllable-width pulse signal
Publication Date: 2022.12.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11539354B2 patent drawing
  • US11539354B2 patent drawing
  • US11539354B2 patent drawing

AI summary

Systems, methods, and devices are provided for a circuit for generating a pulse output having a controllable pulse width. Systems and methods may include a delay line having a plurality of stages. A delay per stage calculation circuit is configured to determine a per-stage delay of the delay line using a first clock input. A pulse generation circuit is configured to generate the pulse output using the delay line based on the per-stage delay using a second clock input, the second clock input having a lower frequency than the first clock input.