Switched Capacitor Delay Line Random Phase Control
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Solution Overview
Problem
In ultrasound imaging, invariant capacitor access sequences in delay lines can lead to unwanted tones due to component parameter mismatches, resulting in undesirable artifacts in ultrasound images.
Innovation Solution
A delay line control circuit that randomizes the capacitor access sequence using a pseudo-random number generator and random phase generator circuit, adding pseudo-random values to the sequence value for each access cycle, and optionally changing the number of capacitors accessed in each cycle to prevent the creation of unwanted tones.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a fixed capacitor access sequence is used in the delay line, then the circuit operation is simple and predictable, but unwanted tones and artifacts are generated due to component parameter mismatches
Solution Approach 1:
The patent applies dynamics by transforming the static, fixed capacitor access sequence into a dynamic, randomized sequence. The random phase generator circuit continuously varies the access sequence based on pseudo-random phase values, making the system adaptive and time-variant. This dynamic approach prevents the periodic mismatches that cause unwanted tones while maintaining controlled randomness through the generator circuit.
Solution Approach 2:
The patent changes the temporal parameter of the capacitor access sequence by introducing random phase shifts. Instead of accessing capacitors in a fixed repeating pattern, the access timing parameters are modified using pseudo-random values from the random phase generator. This parameter change disrupts the coherent addition of mismatch errors that produces tones, converting them into incoherent noise that can be filtered.
2Ease of manufacture
If component parameter mismatches are present in the delay line capacitors, then manufacturing is simplified, but periodic unwanted tones are generated in the output signal
Solution Approach 1:
The patent converts the harmful effect of component mismatches into a beneficial outcome. Instead of trying to eliminate mismatches through tight manufacturing tolerances, the system intentionally introduces random phase variations that transform the deterministic tone-generating mismatches into random-phase errors. These random errors sum incoherently, converting harmful periodic tones into acceptable random noise that preserves the ease of manufacturing while eliminating the artifacts.
3Object-generated harmful factors
If the capacitor access sequence is randomized using a pseudo-random number generator, then unwanted tones are suppressed, but the control circuit complexity increases
Solution Approach 1:
The patent introduces an intermediary component - the random phase generator circuit - that mediates between the simple capacitor array and the desired noise suppression outcome. This intermediary generates pseudo-random phase values that control the access sequence, acting as a buffer that adds complexity only where needed to randomize the timing without requiring complex modifications to the capacitor array itself or the signal processing path.
Data Source
AI summary
A delay line control circuit includes a pseudo-random number generator and a random phase generator circuit coupled to the pseudo-random number generator. The pseudo-random number generator is configured to produce a predetermined sequence of pseudo-random values. The random phase generator circuit is configured to randomize an access sequence for capacitors of a delay line. The random phase generator circuit includes a sequence register, an adder, and gating circuitry. The sequence register is configured to a store a value identifying one of the capacitors to be accessed. The adder is coupled to the sequence register, and is configured to increment the value stored in sequence register. The gating circuitry is coupled to the pseudo-random number generator and the adder. The gating circuitry is configured to pass one of the pseudo-random values to the adder for addition to the value stored in the sequence register.