Continuous-Time Sampler Circuit Using Delay-Line Signal Holding
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Solution Overview
Problem
Existing analog-to-digital converters (ADCs) face challenges with noise and non-linearities due to switched-capacitor circuits, particularly in wideband applications, where issues like aliasing and 'kT/C' noise are undesirable.
Innovation Solution
A continuous-time sampler using series-connected delay lines with intermediate output taps and controlled switches, which stores time-shifted waveforms of the input signal, allowing the same input value to be made available at the output without switched-capacitor circuits, thereby avoiding noise sources associated with them.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If switched-capacitor circuits are used in ADCs, then signal sampling and conversion can be achieved, but noise and non-linearities are introduced
Solution Approach 1:
The patent extracts and removes the switched-capacitor circuits from the ADC architecture, replacing them with continuous-time sampling circuits. This extraction eliminates the source of kT/C noise and non-linearities while preserving the essential sampling and conversion functions through alternative circuitry that operates in continuous time rather than discrete switched intervals.
Solution Approach 2:
The patent changes the fundamental operating parameter from discrete-time switching to continuous-time operation. By transitioning from switched-capacitor discrete sampling to continuous-time sampling with delay lines and buffers, the system maintains sampling functionality while eliminating the periodic noise and non-linearities inherent in switched-capacitor architectures.
2Productivity
If switched-capacitor circuits are used for sampling, then signal conversion is enabled, but aliasing occurs in wideband applications
Solution Approach 1:
The patent implements continuous-time sampling that maintains uninterrupted signal processing throughout the conversion process. By using continuous-time delay lines and buffers instead of periodic switching, the system provides continuous action that avoids the spectral folding and aliasing effects that occur with discrete-time switched-capacitor sampling in wideband applications.
3Reliability
If continuous-time sampler with delay lines is used, then noise and non-linearities are reduced, but circuit complexity increases
Solution Approach 1:
The patent substitutes the mechanical switching action of switched-capacitor circuits with a continuous-time electrical signal processing approach using delay lines and buffers. This substitution replaces the discrete mechanical switching mechanism with a continuous electrical field-based system, reducing noise and non-linearities while managing complexity through elegant circuit topology rather than numerous discrete components.
4Ease of operation
If switched-capacitor circuits are used, then sampling function is achieved, but area requirements increase
Solution Approach 1:
The patent merges multiple functions into the continuous-time delay line and buffer structure. The delay lines simultaneously provide signal delay, buffering, and sampling functionality, while the buffers provide both signal isolation and holding capability. This merging of functions reduces the total component count and circuit area compared to traditional switched-capacitor implementations that require separate switches, capacitors, and holding circuits.
Data Source
AI summary
A continuous-time sampler has series-connected delay lines with intermediate output taps between the delay lines. Signal from an output tap can be buffered by an optional voltage buffer for performance. A corresponding controlled switch is provided with each output tap to connect the output tap to an output of the continuous-time sampler. The delay lines store a continuous-time input signal waveform within the propagation delays. Controlling the switches corresponding to the output taps with pulses that match the propagation delays can yield a same input signal value at the output. The continuous-time sampler effectively “holds” or provides the input signal value at the output for further processing without requiring switched-capacitor circuits that sample the input signal value onto some capacitor. In some cases, the continuous-time sampler can be a recursively-connected delay line. The continuous-time sampler can be used as the front end sampler in a variety of analog-to-digital converters.