Adaptive Voltage Scaling via Delay Line Stage Counting
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Solution Overview
Problem
Conventional system-on-a-chip (SOC) designs inefficiently manage power consumption by targeting the slowest process, power supply voltage, and temperature (PVT) corner, leading to increased power usage due to the need for specialized circuits to measure and adjust voltage based on frequency and temperature, which increases cost and chip area.
Innovation Solution
The method involves using a delay line in a delayed locked loop to determine the number of stages corresponding to a desired timing delay, comparing this with actual stages, and adjusting the power supply voltage to optimize power consumption by dynamically scaling the voltage based on measured delays, thereby eliminating the need for additional hardware to measure frequency and temperature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional adaptive voltage scaling circuits are used to measure frequency and temperature, then power consumption can be optimized, but chip area and cost increase due to additional specialized hardware
Solution Approach 1:
The delay line, originally designed for timing control functions, is made to serve dual purposes: it now simultaneously measures critical path delay for voltage scaling decisions. This multi-functionality eliminates the need for separate frequency and temperature measurement circuits, reducing chip area while maintaining power optimization capabilities
Solution Approach 2:
The delay line inherently reflects the combined effects of frequency and temperature variations through its delay characteristics. By using the delay line's own performance metrics (number of stages) to trigger voltage adjustments, the system achieves self-service measurement without requiring external sensors or additional measurement hardware
2Reliability
If the slowest PVT corner is targeted for all timing corners, then timing reliability is ensured, but power consumption increases due to conservative voltage scaling
Solution Approach 1:
The system transitions from a static voltage scaling approach (fixed for all PVT corners) to a dynamic approach where voltage is continuously adjusted based on real-time delay measurements. The delay line monitoring enables the system to adapt voltage scaling to actual operating conditions, ensuring timing reliability only when necessary while saving power during normal operations
Solution Approach 2:
The system changes the operating parameter (power supply voltage) based on measured delay characteristics. By monitoring the number of delay line stages and comparing against thresholds, the system dynamically adjusts voltage to maintain timing reliability at critical corners while avoiding unnecessary power consumption at non-critical corners
Data Source
AI summary
In one embodiment, a method includes determining, for an integrated circuit chip, a delay measurement corresponding to a first number of stages in a delay line. A power supply voltage measurement is also determined. The method determines a second number of stages correlated to the power supply voltage measurement. The second number of stages correspond to a desired timing delay. It is determined if a power supply voltage should be adjusted using a comparison based on the first number of stages and the second number of stages. A control signal is output for adjusting the power supply voltage when it is determined the power supply voltage should be adjusted.