Delay-Locked Loop Circuit With Hybrid Delay Calibration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current delay-locked loop circuits use all-digital circuits with fixed delay units, leading to poor delay accuracy.
Innovation Solution
A delay-locked loop circuit that includes a delay distribution circuit, a phase comparator, and a voltage generation circuit, which adjusts digital and analog delay durations dynamically to synchronize clock signals by adjusting the analog delay duration within a preset range using feedback mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all-digital circuits with fixed delay units are used, then device complexity is reduced, but delay accuracy deteriorates
Solution Approach 1:
The delay adjustment function is segmented into two independent parts: a digital delay adjustment module that provides coarse adjustment in fixed steps, and an analog delay adjustment module that provides fine continuous adjustment. This segmentation allows each module to be optimized independently, maintaining relatively simple structures while achieving high delay accuracy through their combined operation.
2Ease of manufacture
If fixed delay units are used in all-digital circuits, then manufacturing simplicity is improved, but delay precision deteriorates
Solution Approach 1:
The patent changes the delay duration parameter from fixed digital steps to continuously adjustable analog values. The analog delay adjustment module uses voltage-controlled delay elements that can dynamically adjust the delay duration parameter across a continuous range, enabling precise delay control while maintaining ease of manufacture through standard integrated circuit implementation techniques.
3Measurement precision
If dynamic delay adjustment is implemented, then delay accuracy is improved, but device complexity increases
Solution Approach 1:
A feedback mechanism is implemented where the phase comparator continuously monitors the phase difference between the input clock signal and the delayed output signal. The feedback control logic uses this phase information to automatically adjust the digital and analog delay adjustment modules, closing the delay-locked loop. This feedback system enables automatic delay calibration and synchronization without requiring complex external control circuits.
Data Source
AI summary
A delay-locked loop circuit including: a delay distribution circuit, which delays the zeroth delay signal by a digital delay duration to generate a delay signal, delays the delay signal by a first, second reference duration, an analog delay duration to generate a first, third, second clock signals, adjust the digital, analog delay duration to obtain an adjusted analog delay duration, according to the first, second, third clock signals, output an adjusted second clock signal when the adjusted analog delay duration is within a preset duration range; a phase comparator, which performs phase comparison on the adjusted second clock signal and a reference clock signal, to generate a first, second signals; a voltage generation circuit, which generates a regulation voltage according to the first, second signals, to readjust the adjusted analog delay duration until a twice-adjusted second clock signal is synchronized with the reference clock signal.