Delay Loop Injection Point Control for Digital Phase Locking

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Solution Overview

Problem

Existing voltage controlled delay loops for clock and data recovery require complex analog phase lock controllers and digital-to-analog conversion, making them difficult to port between technologies and limiting their digital control capabilities.

Innovation Solution

A voltage controlled delay loop with digital phase control, where the injection point of the reference clock into a series of delay elements is selectively controlled, allowing for precise phase relationship management between the reference clock and sample clock, utilizing a multiplexer in each delay element to achieve granular phase adjustments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an analog phase lock controller is used to control delay stages in a voltage controlled delay loop, then the timing signals can be phase locked to the reference clock, but the circuit complexity increases and portability between technologies becomes difficult

Engineering Contradiction:
Improvephase lock capabilityVSAvoidanalog controller complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces the analog phase lock controller with a digital implementation. The delay elements are controlled by digital signals from a phase detector and digital filter, eliminating the need for complex analog circuitry while maintaining the phase lock capability between timing signals and reference clock.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces a digital filter as an intermediary between the phase detector and the delay elements. This digital filter processes the error signal digitally, serving as a mediator that simplifies the overall control architecture while maintaining reliable phase locking.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If digital-to-analog conversion is used to convert digital phase adjustment control into analog signal control, then the phase can be adjusted digitally, but the circuit complexity increases and technology portability is limited

Engineering Contradiction:
Improvedigital phase controlVSAvoiddigital-to-analog conversion circuit
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent eliminates the digital-to-analog converter by implementing the entire control system in the digital domain. Digital signals directly control the delay elements through digital logic circuits, allowing digital phase adjustment without requiring DAC circuitry, thereby reducing complexity and improving technology portability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If a voltage controlled delay loop is implemented with analog components, then continuous phase adjustment is possible, but the circuit is complex and difficult to port between technologies

Engineering Contradiction:
Improvephase adjustment rangeVSAvoidanalog circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the continuous phase adjustment range into discrete steps, where each delay element provides a specific delay increment. Multiple delay elements can be selectively enabled to achieve different phase adjustments, providing adaptability while using simpler digital control logic instead of complex analog circuits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic phase adjustment by allowing digital control signals to selectively enable or disable different delay elements in real-time. This dynamic reconfiguration capability provides versatile phase adjustment while maintaining simplicity through digital logic rather than complex analog circuitry.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8067966B2Voltage controlled delay loop and method with injection point control
Publication Date: 2011.11.29 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8067966B2 patent drawing
  • US8067966B2 patent drawing
  • US8067966B2 patent drawing

AI summary

A voltage controlled delay loop and method are disclosed for clock and data recovery applications. The voltage controlled delay loop generates clock signals having similar frequency and different phases. The voltage controlled delay loop comprises a plurality of delay elements; and an input that selectively injects a reference clock into any one of the plurality of delay elements. The plurality of delay elements are connected in series, such as in a loop. In one exemplary implementation, each delay element has an associated multiplexer that selects one of the reference clock and a signal from a previous delay element.