Delay-Locked Loop Coarse Tuning to Cut Phase Noise and Varactor Size
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Solution Overview
Problem
Increasing the operating frequency range of delay-locked loops (DLLs) while minimizing varactor size and phase noise, as larger varactors consume excessive space and lead to increased phase noise.
Innovation Solution
Implementing coarse tuning circuitry in DLLs with multiple switched capacitors, allowing for adjustments based on phase detector signals to increase tuning range, reduce phase noise, and mitigate false locking and duty cycle distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the size of a varactor is increased to achieve a wide operating frequency range, then the tuning range is improved, but the area occupied and phase noise increase
Solution Approach 1:
The patent divides the single large varactor into multiple smaller varactors connected in parallel. Each varactor is controlled by a separate switch, allowing individual selection and combination. This segmentation enables the system to achieve a wide tuning range by activating different combinations of smaller varactors, avoiding the need for a single large varactor that would consume excessive area and generate increased phase noise.
2Adaptability or versatility
If the size of a varactor is increased to achieve a wide operating frequency range, then the tuning range is improved, but phase noise increases
Solution Approach 1:
The patent segments the varactor system into multiple smaller varactors, each contributing to the overall tuning range. By using multiple smaller varactors instead of one large varactor, the phase noise is reduced because smaller varactors generate less phase noise individually, and their combined effect provides the desired wide tuning range without the harmful phase noise of a single large component.
Solution Approach 2:
The patent implements dynamic control of varactor combinations through switch circuitry. The system can dynamically select and switch between different varactor configurations based on the desired frequency range, optimizing performance by using appropriate varactor subsets for different operating conditions. This dynamic switching capability allows the system to maintain low phase noise while achieving wide tuning range.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the DLL's tuning range, decreases phase noise, and improves settling time by allowing for larger-grain adjustments without increasing varactor size, thus addressing the limitations of existing DLLs.
Implementation Method 1
a voltage-controlled delay line (VCDL) electrically coupled to the loop filter and including a plurality of switched capacitors
Data Source
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AI summary
To increase the operating frequency range of the DLL while decreasing varactor sizes, coarse tuning circuitry may be implemented in a delay-locked loop (DLL). The DLL may include a voltage-controlled delay line (VCDL) including multiple switched capacitors coupled in parallel to each other. An electrical ground may be coupled to the parallel switched capacitors at a first node and a buffer and variable capacitor may be coupled to the parallel switched capacitors at a second node. The coarse tuning circuitry may be electrically coupled to a phase detector and to the multiple switched capacitors of the VCDL, such that the coarse tuning circuitry may receive a signal (e.g., an indication of a phase) from the phase detector and may adjust switched capacitor loading based on the signal received from the phase detector. Such a DLL implementation may increase DLL tuning range and decrease phase noise, among other advantages.