Delayed Cache Coherence Protocol for Scalable Multi-Node Memory Systems
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Solution Overview
Problem
As the number of nodes and size of computing systems grow, maintaining consistency of data in local caches across processing nodes becomes increasingly challenging, leading to scalability issues due to overhead in cache coherence management.
Innovation Solution
A delayed cache coherence protocol is implemented, using a combination of software instructions and hardware to track coherence at the granularity of chunks, allowing temporary non-coherence and simplifying the protocol while ensuring high scalability and implementation simplicity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional cache coherence protocols are used to maintain data consistency across processing nodes, then data coherence is ensured, but system overhead increases and scalability deteriorates
Solution Approach 1:
The patent segments the cache coherence management by introducing a store buffer that separates the store instruction issuance from the actual memory update and coherence propagation. This buffering mechanism divides the coherence maintenance into discrete stages, reducing the immediate overhead on each store operation while maintaining eventual consistency across nodes.
Solution Approach 2:
The store buffer performs preliminary action by queuing store instructions and batch-processing them before actual memory updates. This allows multiple store operations to be prepared and coordinated in advance, reducing the per-operation overhead and improving scalability without sacrificing coherence guarantees.
2Reliability
If cache coherence is maintained at every memory access, then data consistency is preserved, but performance decreases due to frequent invalidation messages
Solution Approach 1:
The store buffer implements periodic action by batch-processing store instructions at intervals rather than immediately on each access. This allows the system to accumulate multiple store operations and process them together, reducing the frequency of coherence protocol activations and invalidation messages while maintaining data consistency.
Solution Approach 2:
The store buffer maintains continuity of useful action by keeping store instructions in flight and processing them continuously rather than stalling the processor on each memory operation. This allows the system to maintain high throughput while still ensuring coherence through the buffered store operations.
3Device complexity
If chunk granularity is used for coherence tracking instead of line granularity, then protocol complexity is reduced and scalability improves, but measurement precision of cache state decreases
Solution Approach 1:
The patent applies segmentation by dividing the cache into chunks rather than tracking individual lines, which simplifies the coherence protocol state machine and reduces the complexity of coherence management. The store buffer tracks chunks at a higher level of abstraction, reducing the number of state transitions required while maintaining adequate precision for coherence enforcement.
Solution Approach 2:
The store buffer implements local quality by allowing different precision levels for different cache regions or access patterns. The chunk-based tracking provides sufficient precision for most operations while reducing overall complexity, and can be augmented with more fine-grained tracking only when specifically needed for particular coherence scenarios.
Data Source
AI summary
Examples described herein relate to caching in a system with multiple nodes sharing a globally addressable memory. The globally addressable memory includes multiple windows that each include multiple chunks. Each node of a set of the nodes includes a cache that is associated with one of the windows. One of the nodes includes write access to one of the chunks of the window. The other nodes include read access to the chunk. The node with write access further includes a copy of the chunk in its cache and modifies multiple lines of the chunk copy. After a first line of the chunk copy is modified, a notification is sent to the other nodes that the chunk should be marked dirty. After multiple lines are modified, an invalidation message is sent for each of the modified lines of the set of the nodes.