Delayed Data Clock Phase Shifting to Reduce Recovery Jitter
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Solution Overview
Problem
Existing data clock recovery systems in communication systems often experience phase jitter due to unnecessary phase shifting, leading to reduced link performance and limited data transfer rates, as they induce periodic phase shifting even when the frequencies of the input data stream and data clock are nearly identical.
Innovation Solution
A data clock recovery system that includes a phase detector sampling the input data stream with a data clock and a second clock to generate a signal indicating phase differences, and a phase controller that shifts the phase of the second clock towards a second preferred phase, with the data clock phase shifting delayed compared to the second clock, to minimize unnecessary adjustments and reduce phase jitter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the data clock phase is continuously adjusted based on phase detection signals, then the phase alignment between data clock and input data stream is improved, but phase jitter increases due to unnecessary periodic phase shifting when frequencies are nearly identical
Solution Approach 1:
The system performs preliminary frequency comparison between the data clock and input data stream before executing phase adjustment. By detecting frequency differences in advance, the system determines whether phase adjustment is necessary, thereby preventing unnecessary periodic phase shifting that causes jitter while maintaining accurate phase alignment when needed
Solution Approach 2:
The system uses feedback from both phase detection and frequency detection to control the phase adjustment process. The phase detector provides phase alignment information while the frequency detector provides frequency difference information, and both feedback signals are combined to intelligently control whether phase shifting should occur, resolving the contradiction between alignment accuracy and phase stability
2Manufacturing precision
If phase shifting is applied to correct frequency drift and maintain proper sampling, then data sampling accuracy is improved, but link performance deteriorates due to induced phase jitter
Solution Approach 1:
The system performs preliminary frequency comparison before executing phase adjustment operations. By detecting frequency differences in advance, the system determines whether phase adjustment is actually needed for proper sampling, thereby preventing unnecessary phase shifting that degrades link performance while maintaining sampling accuracy when frequency correction is truly required
Solution Approach 2:
The system changes the operational parameters of the phase adjustor based on frequency detection results. When frequency difference exceeds a threshold, phase adjustment parameters are activated to maintain sampling accuracy; when frequencies are matched, parameters are deactivated to preserve link performance, thus dynamically optimizing both sampling accuracy and reliability
Data Source
AI summary
A data clock recovery system is provided. A phase detector is configured to sample an input data stream by way of a data clock and a second clock to generate a first signal indicating whether a data clock lags or leads a preferred phase of the data clock in relation to an input data stream. A phase controller is configured to process the first signal to shift a phase of the second clock toward a second preferred phase, and to shift a phase of the data clock toward the first preferred phase after the shifting of the phase of the second clock.