Delayed SPI Clocking Across Isolation Barriers for Higher Bandwidth
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Solution Overview
Problem
High-speed isolated Serial Peripheral Interface Bus (SPI) communication systems face bandwidth limitations due to propagation delays across isolation devices, which are exacerbated by the need for additional isolation channels and complex clock signal routing in existing methods.
Innovation Solution
Incorporating a delay circuit to generate a delayed clock signal that lags the original clock signal by the round trip propagation delay across the isolation barrier, allowing the master device to read data using this delayed signal, thus increasing communication bandwidth without requiring additional isolation channels or complex encoding/decoding circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If isolation devices are used in the communication channel, then data transmission isolation is achieved, but propagation delay increases and bandwidth is reduced
Solution Approach 1:
The system pre-calibrates the round-trip propagation delay through the isolation device during initialization or setup phase. This preliminary measurement of delay characteristics enables the master device to compensate for isolation device latency by adjusting clock timing, thereby maintaining high bandwidth while using isolation devices for reliable data transmission
Solution Approach 2:
The system dynamically adjusts clock signal parameters (timing, phase, or frequency) based on the measured propagation delay through the isolation device. By changing clock signal timing parameters to account for isolation device delay, the system achieves both reliable isolated transmission and maintains high communication bandwidth
2Measurement precision
If additional isolation channels are used to send reference clock, then clock synchronization is achieved, but space and power consumption increase
Solution Approach 1:
The existing data isolation channels are made multi-functional by using them for both data transmission and reference clock transmission. The same isolation device that isolates data signals also isolates the reference clock signal, eliminating the need for separate dedicated clock isolation channels and reducing overall power consumption
Solution Approach 2:
The system merges the reference clock transmission function with the data transmission isolation infrastructure. By combining clock signal routing with existing data isolation channels, the system achieves clock synchronization without adding separate isolation hardware, thereby reducing space and power requirements
3Productivity
If clock speed is increased, then communication bandwidth is improved, but propagation delay becomes more significant
Solution Approach 1:
The system performs preliminary calibration to measure the exact round-trip propagation delay through the isolation device before high-speed communication begins. This advance knowledge of delay characteristics allows the system to operate at maximum clock speeds while compensating for propagation delay effects, thereby achieving high bandwidth without being constrained by time loss
Solution Approach 2:
The system adjusts clock signal timing parameters based on the measured propagation delay to optimize the balance between clock speed and delay compensation. By dynamically tuning clock timing parameters, the system can operate at higher speeds while accounting for the fixed propagation delay through the isolation device
Data Source
AI summary
A system may include a plurality of isolators to transfer data signals across an isolation barrier, one of the signals including a clock signal. A delay circuit may be included to receive the clock signal and provide a delayed clock signal that lags the clock signal by an amount representing a delay across the isolation barrier. The delayed clock signal may be delayed by a round trip propagation delay over the isolation barrier. The delayed clock signal may be used as a reference to read data sent over the isolation barrier.