Neural Network Delta Feature Map Processing for Speed and Power

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Solution Overview

Problem

Current neural network technologies face challenges in processing speed and power consumption when analyzing successively input image frames in real-time, requiring efficient methods to perform neural network operations.

Innovation Solution

A method involving a processing circuit that generates a second delta feature map by performing a linear operation on a first delta feature map, loads feature values from memory for a partial region to be updated in the feature map, and updates the feature map by storing the current feature map, thereby reducing the number of operations and memory transactions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a neural network device processes successively input image frames using conventional methods, then it can perform real-time analysis, but it consumes excessive power and operates at low speed

Engineering Contradiction:
Improveprocessing speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent pre-calculates and stores delta feature maps representing differences between consecutive image frames before full processing. When a new frame arrives, only the delta changes need to be processed and applied to previous results, rather than reprocessing the entire frame from scratch. This preliminary preparation of difference data significantly reduces the computational workload for real-time processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts and processes only the delta feature maps (changes between frames) rather than processing complete image frames. By separating and processing only the changed portions, the system reduces the volume of data requiring intensive neural network operations, thereby lowering power consumption while maintaining processing speed.

Inventive Principle:
Principle #2Taking out (Extraction)

2Productivity

If the neural network device processes all feature maps completely, then it ensures comprehensive analysis, but it increases the number of memory transactions and reduces processing efficiency

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidmemory transaction time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent extracts and processes only the delta feature maps (changes between frames) rather than processing complete image frames. By separating and processing only the changed portions, the system reduces the volume of data requiring intensive neural network operations, thereby lowering power consumption while maintaining processing speed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of processing all feature maps completely, the patent applies partial processing by updating only the portions of feature maps that have changed between frames. This selective updating approach reduces memory transactions and computational overhead while still capturing all relevant information for accurate analysis.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11074474B2Apparatus for performing neural network operation and method of operating the same
Publication Date: 2021.07.27 SAMSUNG ELECTRONICS CO LTD
  • US11074474B2 patent drawing
  • US11074474B2 patent drawing
  • US11074474B2 patent drawing

AI summary

A method of operating a neural network device configured to perform a neural network operation on successively input image frames includes generating, by a processing circuit, a second delta feature map by performing a linear operation on a first delta feature map generated based on a difference between a current image frame and a previous image frame; loading feature values as a second previous feature map onto the processing circuit from at least one memory, the loaded feature values being feature values corresponding to a first partial region to be updated in a first feature map stored in the at least one memory; generating, at the processing circuit, a second current feature map based on the second delta feature map and the second previous feature map; and updating the first feature map by storing the second current feature map in the at least one memory.