Delta Metal eFuse Layout for Low-Current Memory Cells

Solution Overview

Problem

Conventional non-volatile memory technologies, such as those using electrical fuses (eFuses), face challenges in reducing the size and power consumption of memory cells while maintaining efficient programming and reading capabilities.

Innovation Solution

The implementation of delta metal fuses (dfuses) with metal fuse elements arranged in parallel with overlap and offset within the same metal layer, reducing the fuse area and programming current, allowing for smaller transistor sizes and more efficient memory cell design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If conventional eFuse structures are used, then the memory cell can store non-volatile data, but the fuse area is large and programming current is high

Engineering Contradiction:

Improvefuse areaVSAvoidprogramming capability

Core Design Contradiction:

Area of moving objectVSReliability

Solution Approach 1:

The fuse link is divided into multiple segments arranged in parallel between the anode and cathode. This segmentation allows the total fuse area to be distributed across multiple smaller segments, reducing the area required per segment while maintaining the overall programming capability through the parallel configuration.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The fuse segments are arranged in a parallel configuration within the same metal layer, utilizing horizontal spacing and vertical stacking to reduce the footprint area. This dimensional arrangement allows multiple fuse segments to coexist in a compact space without increasing the programming current significantly.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Use of energy by moving object

If conventional eFuse structures are used, then the memory cell can store non-volatile data, but the programming current is high

Engineering Contradiction:

Improveprogramming currentVSAvoidprogramming capability

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The fuse link is divided into multiple segments arranged in parallel between the anode and cathode. This segmentation allows the total fuse area to be distributed across multiple smaller segments, reducing the area required per segment while maintaining the overall programming capability through the parallel configuration.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The fuse segments are arranged in a parallel configuration within the same metal layer, utilizing horizontal spacing and vertical stacking to reduce the footprint area. This dimensional arrangement allows multiple fuse segments to coexist in a compact space without increasing the programming current significantly.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Area of moving object

If fuse link size is reduced, then the memory cell area is reduced, but the programming current density increases

Engineering Contradiction:

Improvememory cell areaVSAvoidprogramming current density

Core Design Contradiction:

Area of moving objectVSUse of energy by moving object

Solution Approach 1:

The fuse link is divided into multiple segments arranged in parallel between the anode and cathode. This segmentation allows the total fuse area to be distributed across multiple smaller segments, reducing the area required per segment while maintaining the overall programming capability through the parallel configuration.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Multiple fuse segments are combined in parallel between the same anode and cathode, merging their conductive paths. This merging allows the total programming current to be distributed across multiple segments, reducing the current density in each individual segment while maintaining the overall programming capability.

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a significant reduction in fuse area by approximately 95% and lowers the programming current from 10 mA to less than 1 μA, enabling smaller transistor sizes and improved power efficiency in non-volatile memory cells.

Implementation Method 1

EFuses are usually integrated into semiconductor ICs by using a narrow strip commonly called a 'fuse link' of conducting material (e.g., metal, poly-silicon, etc.) between two pads

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

Applying a programing current to the eFuse destroys (i.e., fuses) the link, thus changing the resistivity of the eFuse

Methodology Applied

Scientific EffectResistivity change: Electrical Resistance

Data Source

PatentUS12165865B2Efuse with fuse walls and method of manufacturing the same

Publication Date: 2024.12.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A metal fuse structure may be provided. The metal fuse structure may comprise a first fuse element and a second fuse element. The second fuse element may be adjacent to the first fuse element for a length L. The second fuse element may be spaced apart from first fuse element by a width W.