Delta-Sigma ADC Serialized Quantizer Output With Lower Bit Rate
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Solution Overview
Problem
Delta-sigma analog-to-digital converters (ADCs) with multiple quantizer levels face increased power requirements and electromagnetic interference due to high serial data rates, making it desirable to implement a serialized quantizer output without the need for high bit rates.
Innovation Solution
A delta-sigma ADC circuit that serializes the quantizer output using a digital-to-analog converter and a serial data circuit, encoding additional information in redundant codes to reduce the bit rate, allowing as few as two bits to represent the quantizer output, and using a difference circuit to provide feedback to the loop filter, enabling efficient data transmission over a single channel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the quantizer output is transferred using a typical serial interface, then data can be transmitted over a single channel, but the increased data rate requires increased power, increased component bandwidth and higher generated levels of electromagnetic interference
Solution Approach 1:
The quantizer output data stream is segmented into multiple parallel lower-rate streams by distributing different quantizer levels across multiple output channels. Instead of serializing all 17 levels sequentially at high speed, the system divides the data into parallel groups that can be transmitted simultaneously at lower individual rates, reducing peak power requirements and EMI while maintaining the ability to reconstruct the full quantizer output.
2Ease of operation
If the quantizer output is transferred using a typical serial interface, then data can be transmitted over a single channel, but the increased data rate requires increased power, increased component bandwidth and higher generated levels of electromagnetic interference
Solution Approach 1:
The quantizer output is divided into multiple parallel data streams that are transmitted simultaneously over the single channel. This segmentation reduces the data rate of each individual stream, thereby reducing the electromagnetic interference generated by each transmission event while still delivering the complete quantizer output information through the combination of parallel streams.
3Ease of operation
If the quantizer output is transferred using a typical serial interface, then data can be transmitted over a single channel, but the increased data rate requires increased power, increased component bandwidth and higher generated levels of electromagnetic interference
Solution Approach 1:
The high-rate serial transmission is replaced by multiple parallel lower-rate streams. The quantizer output levels are distributed across these parallel streams, allowing the system to achieve the same overall data throughput without requiring any single channel to operate at the high data rates that would generate excessive EMI and power consumption.
4Reliability
If a serial interface is used to transfer quantizer output, then isolation can be implemented in circuits such as transformer-coupled or optically-isolated circuits, but the increased data rate comes with increased power requirements and higher generated levels of electromagnetic interference
Solution Approach 1:
The quantizer output data is segmented into multiple parallel streams that can be transmitted through isolated interfaces at lower individual data rates. This approach maintains the isolation benefits for circuits like transformer-coupled or optically-isolated circuits while reducing the power requirements associated with high-speed serial transmission across the isolation barrier.
Data Source
AI summary
A delta-sigma analog-to-digital converter (ADC) having a serialized quantizer output has a data rate greater than a quantization rate of the delta-sigma modulator, but less than a bit rate determined by the product of the number of bits required to represent the input to a feedback digital-to-analog converter and the quantization rate. Additional information can be encoded in the serial bit stream by selection among redundant codes based on the value of the additional information. The serial bit stream may encode differences between successive quantizer output samples and the additional information may include the absolute value of the quantizer output, synchronization information and/or framing information for distinguishing data corresponding to multiple ADC input channels.