Delta-Sigma ADC Feedback Quantization With Fewer Output Levels

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Solution Overview

Problem

Existing analog-to-digital converters using delta-sigma modulators face challenges with increased complexity and power consumption due to multi-bit designs, which complicate maintaining linearity over component and environmental variations, particularly due to the high number of quantizer output levels.

Innovation Solution

The implementation of a delta-sigma modulator-based analog-to-digital converter that reduces the number of quantizer output levels by integrating the quantizer output and using a difference circuit to provide feedback, transforming the phase/state space of the modulator output, thereby reducing the number of bits required for the feedback DAC and simplifying the quantizer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multi-bit designs are used in delta-sigma modulators, then noise shaping capability and linearity are improved, but device complexity and power consumption increase

Engineering Contradiction:
ImprovelinearityVSAvoidfeedback DAC complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The feedback DAC is segmented into multiple sub-DACs, each handling a portion of the feedback signal. This segmentation reduces the complexity of each individual sub-DAC while maintaining the overall multi-bit feedback functionality, thereby resolving the contradiction between improved linearity and reduced device complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An intermediate digital processing stage is introduced between the quantizer and the feedback DAC. This intermediary processes the quantizer output to reduce the number of bits required for the feedback DAC, thereby improving linearity while reducing feedback DAC complexity and power consumption

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If multi-bit designs are used in delta-sigma modulators, then noise shaping capability is improved, but power consumption increases

Engineering Contradiction:
Improvenoise shaping capabilityVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

An intermediate digital processing stage is introduced that reduces the number of bits required for the feedback DAC. This intermediary enables effective noise shaping while reducing power consumption by minimizing the resolution requirements of power-hungry DAC components

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the parameter of feedback DAC resolution dynamically or effectively, using digital processing to achieve high-resolution noise shaping where needed while using lower resolution elsewhere, thereby improving noise shaping capability while reducing overall power consumption

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If the number of bits in the feedback DAC is increased, then converter linearity is improved, but it becomes more difficult to maintain linearity over component and environmental variations

Engineering Contradiction:
Improveconverter linearityVSAvoidlinearity stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

An intermediate digital processing stage is introduced that performs calibration and correction functions. This intermediary maintains converter linearity through digital correction while reducing reliance on high-precision analog components, thereby improving linearity stability over component and environmental variations

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention replaces sensitive analog linearity-maintaining mechanisms with robust digital processing. By using digital correction and calibration techniques, the system achieves and maintains linearity without relying on precise analog component matching, improving reliability over environmental variations

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS7423567B2Analog-to-digital converter (ADC) having a reduced number of quantizer output levels
Publication Date: 2008.09.09 CIRRUS LOGIC INC
  • US7423567B2 patent drawing
  • US7423567B2 patent drawing
  • US7423567B2 patent drawing

AI summary

An analog-to-digital converter (ADC) having a reduced number of quantizer output levels provides for reduced complexity and power consumption along with improved linearity. The analog-to-digital converter includes a loop filter, a quantizer for quantizing the output of the loop filter and a digital integrator for integrating the output of the quantizer. A difference circuit is included in the converter that produces a signal proportional to the difference between the present value and a previous value of the digital integrator output and provides feedback to the loop filter. The number of levels of the quantizer output is thereby reduced with respect to the modulator output, since the quantizer is operating on a feedback signal that represents changes in the output of the converter modulator rather than the modulator output itself.