Delta-Sigma ADC Duty-Cycle Input Path

Solution Overview

Problem

Continuous-time delta-sigma analog-to-digital converters (ADCs) suffer from signal-to-noise ratio (SNR) degradation due to nonlinear OTA performance and disturbances in the virtual ground caused by discontinuous input and feedback signal paths, particularly when using return-to-zero or capacitive DACs.

Innovation Solution

Implementing a duty-cycle-controlled input signal path with switches aligned to the integration pulse width for return-to-zero DACs and opposing the integration pulse width for capacitive DACs, ensuring the input signal path is conductive only during specific phases of the clock cycle to maintain a constant input current and prevent disturbances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If return-to-zero or capacitive DACs are used in continuous-time delta-sigma ADCs, then the dynamic range and oversampling capability are improved, but the signal-to-noise ratio deteriorates due to nonlinear OTA performance and virtual ground disturbances

Engineering Contradiction:

Improvedynamic rangeVSAvoidsignal-to-noise ratio

Core Design Contradiction:

Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies periodic action by switching the input signal path on and off at specific phases of the clock cycle. The switch is turned off during the feedback current pulse phase and turned on during the remaining phases, creating a periodic gating pattern that synchronizes with the DAC operation. This periodic switching prevents disturbances from propagating to the input signal node while maintaining the beneficial oversampling and dynamic range characteristics of return-to-zero and capacitive DACs.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The patent extracts the harmful feedback current pulse from the input signal path by using a switch to isolate the input signal node during the feedback pulse phase. By removing the input signal connection during the critical feedback injection period, the nonlinear OTA performance and virtual ground disturbances are prevented from affecting the input signal, thereby improving signal-to-noise ratio while preserving the dynamic range enhancement provided by the DAC type.

Inventive Principle:

Principle #2Taking out (Extraction)

2Stability of the object's composition

If the input signal path is continuously conductive, then the continuous-time integration is maintained, but excessive slewing and disturbances occur at the OTA due to discontinuous feedback signal paths

Engineering Contradiction:

Improvecontinuous-time integrationVSAvoidexcessive slewing and disturbances

Core Design Contradiction:

Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The patent implements periodic action by gating the input signal path according to the feedback pulse timing. The switch periodically disconnects the input signal during feedback current injection and reconnects it during other phases, creating a synchronized periodic pattern. This periodic gating prevents excessive slewing and disturbances at the OTA while maintaining continuous-time integration during the active phases, resolving the contradiction between continuous integration and disturbance prevention.

Inventive Principle:

Principle #19Periodic action

3Object-affected harmful factors

If the switch is aligned with integration pulse width for return-to-zero DACs, then the SNR is improved by preventing disturbances, but the input signal path must be discontinuous

Engineering Contradiction:

Improvesignal-to-noise ratioVSAvoidinput signal path continuity

Core Design Contradiction:

Object-affected harmful factorsVSStability of the object's composition

Solution Approach 1:

The patent applies periodic action by switching the input signal path on and off at specific phases of the clock cycle. The switch is turned off during the feedback current pulse phase and turned on during the remaining phases, creating a periodic gating pattern that synchronizes with the DAC operation. This periodic switching prevents disturbances from propagating to the input signal node while maintaining the beneficial oversampling and dynamic range characteristics of return-to-zero and capacitive DACs.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The patent maintains continuity of useful action by ensuring that the input signal path is conductive during the phases when feedback is not being injected. By keeping the path continuous during these useful integration phases and only interrupting it during feedback pulses, the patent preserves the continuous-time integration functionality while preventing harmful disturbances, thus maintaining both SNR and integration continuity.

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS20250317152A1Continuous-time delta-sigma analog-to-digital converter with duty-cycle-controlled input path

Publication Date: 2025.10.09 QUALCOMM INC

AI summary

A delta-sigma analog-to-digital converter is provided that includes a continuous-time integration stage having an input terminal coupled through a switch to an input resistor that in turn couples to an input signal node. A feedback digital-to-analog converter converts a digital output signal to form a feedback current that also couples to the input terminal. A controller switches the first switch responsive to a duty cycle of the feedback current.