Delta-Sigma Frequency Synthesizer for Tunable Clock Accuracy
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Solution Overview
Problem
Conventional low-frequency clock signals have fixed accuracy, which cannot be adjusted to correct drift and cycle-to-cycle jitter, limiting the tunability of frequency synthesizers.
Innovation Solution
A frequency synthesizer architecture that includes a delta-sigma modulation circuit and a digitally-controlled oscillator, allowing for tunable accuracy of the output clock frequency, adjustable power consumption, and rapid convergence, using multistage operations and integrated circuits to generate a low-speed clock signal with long-term accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a fixed resolution control signal is used by the oscillator, then the oscillator can be简单地 controlled, but the accuracy of the low frequency clock signal becomes fixed and cannot be adjusted to correct drift and jitter
Solution Approach 1:
The patent implements a digitally-controlled oscillator where the control signal resolution is dynamically adjustable. The system allows the resolution of the control signal to be changed based on required accuracy levels, transforming a static fixed-resolution system into a dynamic adjustable-resolution system. This enables the oscillator to adapt its control precision to match the desired output accuracy requirements.
Solution Approach 2:
The patent changes the resolution parameter of the control signal to achieve different levels of output accuracy. By adjusting the resolution of the digital control signal fed to the oscillator, the system can achieve variable accuracy levels for the low frequency clock signal, directly addressing the need for tunable accuracy while maintaining simple oscillator control architecture.
2Measurement precision
If higher accuracy is achieved through increased control signal resolution, then drift and jitter correction improves, but device complexity and power consumption increase
Solution Approach 1:
The patent segments the frequency synthesis process into multiple stages with different resolution requirements. Rather than using a single high-resolution control signal throughout, the system divides the synthesis process and applies appropriate resolution levels at each stage, reducing overall device complexity while maintaining the ability to achieve high accuracy when needed.
Solution Approach 2:
The patent applies partial action by using high control signal resolution only when and where it is needed to achieve the required accuracy, rather than applying maximum resolution universally. This allows the system to achieve necessary accuracy levels without the full complexity and power consumption that would result from using maximum resolution throughout the entire synthesis process.
3Measurement precision
If higher accuracy is achieved through increased control signal resolution, then frequency precision improves, but power consumption increases
Solution Approach 1:
The patent implements partial action by applying high control signal resolution only to the extent necessary to achieve the required frequency accuracy. The system adjusts the control signal resolution to match the actual accuracy requirements, avoiding the excessive power consumption that would result from continuously using maximum resolution, thereby reducing power consumption while maintaining necessary frequency precision.
4Device complexity
If fixed accuracy is used in conventional synthesizers, then device complexity is reduced, but the ability to correct drift and cycle-to-cycle jitter is lost
Solution Approach 1:
The patent introduces dynamic adjustability to the control signal resolution, allowing the system to adapt its precision level based on operational requirements. This dynamic capability enables the synthesizer to improve reliability by correcting drift and jitter when needed, while maintaining relative simplicity by not permanently implementing maximum complexity architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the generation of low-speed clock signals with tunable accuracy, adjustable power consumption, and rapid convergence, achieving long-term accuracy of around 1 part-per-million (PPM), suitable for various applications including wireless devices and portable electronics.
Implementation Method 1
The first circuit may be configured to generate a first code by counting a number of cycles of an input clock signal during a period
Implementation Method 2
The second circuit may be configured to generate a third code by a delta-sigma modulation of the first code
Implementation Method 3
The third circuit may be configured to generate the output clock signal in response to the third code. An accuracy of a frequency of the output clock signal may be determined by a current value of the second code
Data Source
AI summary
An apparatus includes a first circuit, a second circuit and a third circuit. The first circuit may be configured to generate a first code by counting a number of cycles of an input clock signal during a period. The period may be determined by an output clock signal and a second code. The second circuit may be configured to generate a third code by a delta-sigma modulation of the first code. The third circuit may be configured to generate the output clock signal in response to the third code. An accuracy of a frequency of the output clock signal may be determined by a current value of the second code.