Delta-Sigma DAC Element Matching for Higher Linearity

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Solution Overview

Problem

Conventional Digital to Analog Converters (DACs) face limitations in linearity and effective number of bits (ENOB) due to mismatch in analog elements, leading to large designs and a practical limit on the maximum achievable number of bits.

Innovation Solution

A system and method utilizing an oversampling delta sigma modulator to modulate digital values, combined with dynamic element matching circuitry and low-pass filtering, to improve linearity and accuracy by shaping quantization error and reducing the number of DAC elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the size of analog elements is increased to improve linearity and ENOB, then manufacturing precision is improved, but device complexity and area increase

Engineering Contradiction:
ImprovelinearityVSAvoiddesign size
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the N-bit digital input into two parts: K most significant bits and N-K least significant bits. The LSB portion is processed by a delta-sigma modulator that breaks down the conversion into multiple stages, separating the handling of different bit significance levels to achieve high precision without requiring all elements to be perfectly matched simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transforms the conversion rate parameter by using oversampling (converting at a rate higher than Nyquist requires) and noise shaping. This parameter change allows the system to achieve high effective number of bits by filtering quantization noise to higher frequencies rather than requiring perfectly matched analog elements across the entire bandwidth.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If the number of DAC elements is increased to improve linearity, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
ImprovelinearityVSAvoidnumber of elements
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent employs dynamic element matching (DEM) circuitry that dynamically assigns DAC elements to different weight positions based on their actual performance characteristics. Instead of statically assigning elements, the system continuously monitors and adapts the mapping between digital codes and analog elements, allowing high linearity to be achieved with fewer elements by optimally utilizing each element's actual performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent incorporates feedback mechanisms where the output of the delta-sigma modulator is fed back into the conversion process. This feedback allows the system to correct for element mismatches dynamically, achieving high effective number of bits without requiring a large number of perfectly matched elements, thereby reducing device complexity while maintaining precision.

Inventive Principle:
Principle #23Feedback

3Manufacturing precision

If oversampling is used to improve linearity through noise shaping, then manufacturing precision is improved, but use of energy increases

Engineering Contradiction:
ImprovelinearityVSAvoidenergy consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The patent uses periodic switching and modulation in the delta-sigma modulator architecture, where elements are switched on and off in regular patterns determined by the oversampling clock. This periodic action enables noise shaping and filtering without requiring continuous high-power operation of all elements, thereby achieving high linearity while managing energy consumption through rhythmic, controlled switching rather than continuous activation.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentEP4622109A1System and method of digital to analog conversion with improved linearity and accuracy
Publication Date: 2025.09.24 NXP BV
  • EP4622109A1 patent drawingFigure 1
  • EP4622109A1 patent drawingFigure 2
  • EP4622109A1 patent drawingFigure 3~4

AI summary

A system and method of digital to analog conversion including modulating a digital value DN-K with an oversampling delta sigma modulator to provide an M-bit coarse quantized value DM, in which DN-K comprises N-K least significant bits of an N-bit digital input value DN and in which quantization error may be shaped to a higher frequency above a signal band of interest, adding DM to a value DK to provide a select value DKM in which DK includes the K remaining most significant bits of DN, and applying mismatch shaping of a total of at least P = 2K elements of a P-element DAC per cycle based on DKM to provide an analog output value. The analog output value may be filtered with a low-pass filter to provide a filtered analog output value. An order of low-pass filtering may be one more than an order of modulating.