Continuous-Time Delta-Sigma Modulator With FIR Feedback for Wider Input Range
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Solution Overview
Problem
Continuous-time delta-sigma modulators face limitations in linearity and input range due to the characteristics of the Gm-C integrator, which restricts the overall performance and introduces aliasing errors from parasitic capacitors in chopper circuits.
Innovation Solution
Incorporating a loop filter with a Gm-C integrator, a chopper circuit to remove low-frequency noise, and a finite impulse response (FIR) filter to increase the input range and eliminate aliasing errors, while subtracting the feedback signal from the input signal at the integrator to break the linearity limitations of the Gm-C integrator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a Gm-C integrator is used for the loop filter, then the modulator can operate in continuous-time mode with low power consumption, but the linearity and input range of the modulator are limited by the integrator's characteristics
Solution Approach 1:
The patent divides the modulator into two distinct paths: a continuous-time path for power-efficient operation and a discrete-time path for high-precision signal processing. The input signal is split, with one branch going through the Gm-C integrator for continuous-time modulation and another branch processed through a separate discrete-time filtering path, thereby resolving the contradiction between power consumption and linearity.
Solution Approach 2:
The patent introduces an additional discrete-time filtering path as an intermediary mechanism that compensates for the linearity limitations of the Gm-C integrator. This intermediary path processes the signal separately and combines results to achieve overall high linearity while maintaining the power efficiency of the continuous-time Gm-C integrator.
2Speed
If a Gm-C integrator is used for the loop filter, then the modulator can operate in continuous-time mode with high speed operation, but the input range of the modulator is limited by the integrator's input range
Solution Approach 1:
The patent segments the signal processing into continuous-time and discrete-time paths, allowing the Gm-C integrator to handle high-speed continuous-time operation while the discrete-time path accommodates a broader input range, thus resolving the contradiction between operation speed and input range adaptability.
Solution Approach 2:
The patent creates a multi-functional system where the Gm-C integrator handles continuous-time high-speed modulation while an additional discrete-time filtering path provides extended input range capability. This universal architecture allows the modulator to adapt to different input signal conditions without sacrificing speed performance.
3Object-affected harmful factors
If a chopper circuit is used to remove low-frequency noise, then noise reduction is achieved, but aliasing errors are introduced due to parasitic capacitors
Solution Approach 1:
The patent extracts and removes the problematic parasitic capacitors from the chopper circuit by implementing a chopper-stabilized integrator architecture that eliminates the need for traditional chopper switching mechanisms. This extraction approach removes the source of aliasing errors while preserving the noise reduction benefits of chopper stabilization.
Solution Approach 2:
The patent converts the potential harm of chopper circuits by using chopper stabilization in a modified architecture where the switching occurs in a manner that does not generate parasitic capacitor effects. The chopper mechanism is used to remove low-frequency noise while the circuit design ensures that aliasing errors are prevented, effectively turning a potentially harmful element into a beneficial one.
Data Source
AI summary
A continuous-time delta-sigma modulator includes a loop filter, a quantizer, a finite impulse response (FIR) filter, and a digital to analog converter. The loop filter integrates a difference between an input signal and a feedback signal. The quantizer quantizes a signal output from the loop filter to convert the quantized signal into a digital signal. The FIR filter performs an FIR filtering process on the digital signal output from the quantizer. The digital to analog converter converts a signal output from the FIR filter into an analog signal and outputs the converted analog signal as a feedback signal.


