Feed-Forward Delta-Sigma Modulator With Lower Integrator Loading
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Solution Overview
Problem
Delta-sigma modulators face challenges in reducing complexity, power consumption, size, weight, and manufacturing costs due to exponential increases in input loading of adders and output loading of integrators, which degrade performance and accuracy.
Innovation Solution
The proposed solution involves modifying the feed-forward gain of delta-sigma modulators by reducing the input loading of the adder and output loading of integrators, effectively reducing the complexity from an Nth order to an (N−1)th order without degrading performance, achieved by moving and merging scaled feed-forward paths and adjusting amplification/delay transfer functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the feed-forward gain is increased to improve dynamic range, then the ability to distinguish small desired signals from blockers improves, but the input loading of adders and output loading of integrators increases exponentially, degrading performance and accuracy
Solution Approach 1:
The patent segments the feed-forward signal paths by introducing multiple quantizers at different stages of the modulator. Each quantizer processes a portion of the signal with appropriate weighting, breaking down the complex high-gain operation into manageable stages. This segmentation allows the system to achieve high dynamic range without requiring excessively high gain in any single component, thereby controlling the loading on adders and integrators.
Solution Approach 2:
The patent transitions from a traditional single-path feed-forward architecture to a multi-dimensional architecture with parallel signal paths and multiple quantization stages. By adding the dimension of multiple quantizers operating at different points in the signal flow, the system achieves high dynamic range through cumulative quantization noise shaping rather than relying on high analog gain, thus avoiding the exponential loading problem.
2Measurement precision
If higher sampling rates are used to improve dynamic range and reduce sensitivity to interfering signals, then the ability to shape quantization noise out-of-band improves, but power consumption increases
Solution Approach 1:
The patent changes the parameter of quantization by introducing multiple quantizers with different resolutions and weightings at different stages of the modulator. Instead of relying solely on high sampling rates to achieve dynamic range, the system uses multi-bit quantization with appropriate bit allocation across stages. This allows effective noise shaping and dynamic range achievement at lower sampling rates, reducing the power consumption associated with high-speed operation.
3Measurement precision
If more integrators and adders are added to increase modulator order for better noise shaping, then quantization noise attenuation improves, but device complexity and manufacturing costs increase
Solution Approach 1:
The patent makes the quantizers multi-functional by having them serve dual purposes: they perform the primary function of signal quantization while simultaneously contributing to noise shaping through their strategic placement and weighting in the feed-forward paths. This multi-functionality allows the system to achieve high-order noise shaping performance without adding proportional numbers of separate integrators and adders, as the quantizers themselves become active participants in the noise shaping process.
Data Source
AI summary
A low distortion feed forward delta sigma modulator includes a first adder configured to receive a feedback signal and an input signal. The modulator also includes a first integrator configured to receive an output from the first adder, and a second integrator configured to receive an output from the first integrator. The modulator further includes a second adder configured to receive a second integrated path from the second integrator, a first integrating path from the first integrator and a first summing path from the input signal. The modulator also has a last integrator configured to receive an output from the second adder.