Delta-Sigma Modulator Feedback Capacitors for Loop Delay Compensation

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Solution Overview

Problem

Continuous-time delta-sigma modulators suffer from excess loop delay due to propagation delay through the comparator, leading to instability and degraded performance.

Innovation Solution

Incorporation of feedback compensation capacitors in the feedback loop to mitigate the propagation delay of the comparator, using capacitive devices or transistors to adjust the feedback signal timing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a comparator is used in the feedback loop of a continuous-time delta-sigma modulator, then the modulator can perform analog-to-digital conversion, but propagation delay through the comparator causes excess loop delay leading to instability and degraded performance

Engineering Contradiction:
Improvefeedback loop stabilityVSAvoidloop delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by anticipating the delay effect and compensating for it in advance. A delay compensation circuit is introduced that predicts the delayed feedback signal and generates a compensated signal before the actual delay occurs, effectively counteracting the propagation delay through the comparator and maintaining loop stability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses an intermediary approach by introducing a delay compensation circuit as a mediator between the comparator and the feedback path. This intermediary circuit processes the feedback signal to compensate for the delay, acting as a buffer that corrects the timing error without requiring fundamental changes to the comparator itself

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Stabilizes the feedback loop and improves the performance of the delta-sigma modulator by compensating for the comparator delay, resulting in a more stable and efficient operation.

Implementation Method 1

A first capacitive device couples to the second transistor control input and to both the second current terminal and the first integrator positive output

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12525989B2Loop delay compensation in a delta-sigma modulator
Publication Date: 2026.01.13 TEXAS INSTRUMENTS INC
  • US12525989B2 patent drawing
  • US12525989B2 patent drawing

AI summary

A delta-sigma modulator includes a first integrator and a comparator. The comparator's positive input couples to the first integrator's positive output, and the comparator's negative input couples to the first integrator's negative output. A first current DAC comprises a current source device, and first and second transistors. The first transistor has a first transistor control input and first and second current terminals. The first current terminal couples to the current source device, and the second current terminal couples to the first integrator positive output. The second transistor has a second transistor control input and third and fourth current terminals. The third current terminal couples to the current source device, and the fourth current terminal couples to the first integrator negative output. A first capacitive device couples to the second transistor control input and to both the second current terminal and the first integrator positive output.