Delta-Sigma Quantizer Reference Control for Loop Delay Stability

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Solution Overview

Problem

Continuous-time delta sigma modulators face instability due to loop delay in feedback loops, leading to reduced signal-to-noise ratios and high hardware costs for compensation.

Innovation Solution

A loop delay compensation circuit that adjusts the reference voltage of the quantizer based on the digital output signal, using a series of integrators and a quantizer to generate an analog output signal, and an N-to-1 coding circuit to select the appropriate reference voltage, reducing the need for complex hardware and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If loop delay compensation is implemented using conventional feedback paths with digital-to-analog converters and summation stages, then the stability of the delta sigma modulator is improved, but the hardware complexity and power consumption increase significantly

Engineering Contradiction:
ImprovestabilityVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the essential compensation function from the complex conventional feedback path and implements it directly at the quantizer stage. By taking out the compensation action from the later feedback path and placing it at the quantizer input, the system achieves stability without requiring the full complex feedback path with digital-to-analog converters and summation stages.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies preliminary action by compensating for loop delay at the quantizer stage rather than waiting for the signal to propagate through the entire feedback loop. The reference voltage is adjusted in advance based on the current digital output signal, preventing the instability issue before it can manifest in the feedback path.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If loop delay compensation is implemented using conventional feedback paths with operational amplifiers, then the signal-to-noise ratio is improved, but the power consumption increases due to expensive operational amplifiers

Engineering Contradiction:
Improvesignal-to-noise ratioVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The patent replaces expensive operational amplifiers with a simple reference voltage adjustment mechanism. Instead of using high-power operational amplifiers in the feedback path, the system uses a low-power digital control signal to adjust the reference voltage, achieving the same signal-to-noise ratio improvement at much lower power consumption.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent substitutes the mechanical/electrical feedback path with operational amplifiers with a digital control system that adjusts the reference voltage. The physical feedback loop with analog components is replaced by a digital control mechanism that achieves the same compensation effect without the power consumption of operational amplifiers.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If the loop delay is left uncompensated, then the hardware complexity is reduced, but the system becomes unstable and signal-to-noise ratio is greatly reduced

Engineering Contradiction:
Improvehardware complexityVSAvoidstability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies preliminary action by compensating for loop delay at the quantizer stage rather than waiting for the signal to propagate through the entire feedback loop. The reference voltage is adjusted in advance based on the current digital output signal, preventing the instability issue before it can manifest in the feedback path.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7535392B2Delta sigma modulator and method for compensating delta sigma modulators for loop delay
Publication Date: 2009.05.19 MEDIATEK INC
  • US7535392B2 patent drawing
  • US7535392B2 patent drawing
  • US7535392B2 patent drawing

AI summary

The invention provides a continuous-time delta sigma modulator. In one embodiment, the continuous-time delta sigma modulator comprises a series of integrators, a quantizer, and a loop delay compensation circuit. The integrators are coupled in series and generate an analog output signal according to an analog input signal. The quantizer quantizes the analog output signal according to a reference voltage to generate a digital output signal as the output of the continuous-time delta sigma modulator. The loop delay compensation circuit adjusts the reference voltage of the quantizer according to the digital output signal to compensate the continuous-time delta sigma modulator for a loop delay.