Delta-Sigma Modulator with Multi-Threshold Quantizers for Higher SNR

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Solution Overview

Problem

Conventional digital transmitters face a decrease in signal-to-noise ratio (SNR) due to quantization noise from delta sigma modulation circuits, which is exacerbated by the large circuit scale required when multiple such circuits are used in parallel.

Innovation Solution

A delta sigma modulation circuit with a single loop filter and multiple quantizers, each with different thresholds, combined with an averaging circuit to calculate and feed back an average signal, reduces quantization noise while maintaining a compact circuit configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple delta sigma modulation circuits are disposed in parallel to improve SNR, then the signal-to-noise ratio is improved, but the circuit scale increases greatly

Engineering Contradiction:
Improvesignal-to-noise ratioVSAvoidcircuit scale
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple quantizers (first quantizer and second quantizer) into a single delta sigma modulation circuit, allowing them to share a common loop filter and feedback path. This combining approach enables the circuit to achieve the SNR improvement of multiple parallel circuits while maintaining a compact scale by reusing common components.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The loop filter is designed to serve multiple functions by processing signals from both the first and second quantizers simultaneously. The feedback signal from the averaging circuit is fed back to this single loop filter, which then distributes it to both quantizers, enabling one component to perform the work of multiple separate filters would require.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Object-generated harmful factors

If multiple delta sigma modulation circuits are disposed in parallel to reduce quantization noise, then the quantization noise relative to main signal decreases, but the device complexity increases

Engineering Contradiction:
Improvequantization noiseVSAvoiddevice complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent combines multiple quantizers and their associated processing into a single integrated circuit structure. The averaging circuit merges the output signals from the first and second quantizers, and this averaged signal is fed back through a single loop filter to both quantizers, reducing device complexity while maintaining noise reduction benefits.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements a feedback mechanism where the averaging circuit calculates the average of the quantizer outputs and feeds this back to the loop filter, which then adjusts the input to both quantizers. This feedback loop enables the system to reduce quantization noise through coordinated operation of multiple quantizers without requiring separate feedback paths for each, thereby reducing overall device complexity.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12580584B2Delta sigma modulation circuit, digital transmission circuit, and digital transmitter
Publication Date: 2026.03.17 MITSUBISHI ELECTRIC CORP
  • US12580584B2 patent drawing
  • US12580584B2 patent drawing
  • US12580584B2 patent drawing

AI summary

Disclosed is a circuit including: a loop filter to perform digital processing on a signal inputted from an outside; multiple quantizers to output 1-bit signals corresponding to magnitude relationships with thresholds on the basis of the signal after the digital processing by the loop filter; and an averaging circuit to calculate the average of the values shown by the signals outputted by the quantizers, and to feed back the average to the loop filter, in which the thresholds used by the quantizers differ from one another.