Delta-Sigma Comparator Circuit for Low-Power Noise Filtering
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Solution Overview
Problem
Conventional sense amplifiers fail to accurately distinguish small differences in voltage or current levels in multi-bit memory elements and imaging devices due to noise interference, leading to reduced memory density and performance.
Innovation Solution
A quantizing circuit that samples electrical parameters multiple times, filters noise through averaging or summing, and uses comparators that consume less power by performing comparisons quickly and reducing current flow to ground, allowing for accurate detection of small differences in multi-bit memory elements and imaging sensors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional sense amplifiers are used to read multi-bit memory elements, then the memory elements can store multiple bits of data, but the sense amplifiers fail to accurately distinguish between the additional voltage levels due to noise
Solution Approach 1:
The patent divides the sensing process into multiple discrete voltage level comparisons. Instead of attempting to measure all voltage levels simultaneously, the sense amplifier sequentially compares the memory element voltage against multiple reference voltages, each corresponding to a specific data threshold. This segmentation allows accurate discrimination of multi-bit data by breaking down the complex measurement into manageable binary comparisons.
Solution Approach 2:
The patent transitions from direct voltage magnitude comparison to a dimensional approach using multiple reference voltage levels. By introducing a vertical dimension of reference voltage tiers, the system can distinguish between multiple data states through sequential threshold crossings rather than relying solely on horizontal voltage difference discrimination, thereby improving precision in noisy environments.
2Reliability
If the number of readable states of the memory element is reduced to improve noise resistance, then noise susceptibility decreases, but memory density and cost are reduced
Solution Approach 1:
The patent implements feedback mechanisms where the output of each comparison stage is fed back to control subsequent comparison operations. This feedback allows the system to adaptively adjust the sensing process based on previously detected voltage level relationships, improving noise resistance through iterative refinement while maintaining the ability to detect all memory states.
Solution Approach 2:
The patent changes the operational parameters of the sense amplifier by introducing multiple reference voltage levels and sequential comparison timing. By varying the reference voltage parameter dynamically during the sensing process, the system can reliably distinguish between multiple memory states without reducing the number of readable states, thereby maintaining both high reliability and memory density.
3Power
If conventional comparators are used in delta-sigma modulators, then the comparison function is performed, but the comparators consume excessive power due to continuous current flow to ground
Solution Approach 1:
The patent implements periodic switching of the comparator current paths using clock signals. Instead of maintaining continuous current flow to ground, the comparators operate in periodic cycles where current is directed to ground only during active comparison phases. This periodic action significantly reduces average power consumption while maintaining full comparator functionality during required operation windows.
Solution Approach 2:
The patent introduces dynamic control of the comparator current paths through clocked switching mechanisms. The comparators transition between active and inactive states dynamically, with current flow to ground being enabled only when comparison operations are required. This dynamic operation allows the system to maintain comparator functionality when needed while minimizing power consumption during idle periods.
Data Source
AI summary
Methods, systems and devices are disclosed, such as an electronic device that includes a plurality of data locations and a delta-sigma modulator. In some embodiments, the delta-sigma modulator includes a preamplifier coupled to the data locations and a latch coupled to the preamplifier.